Array substrate and method for detecting the same
View Patent ↗An array substrate and a method for detecting the array substrate are disclosed. The array substrate comprises a display area and a detecting area. In a first detecting mode, a first to a sixth detecting circuits are divided into three groups, and a first detecting signal is successively provided to these three groups of detecting circuits, so that a circuit defect possibly existing in a charge line and a share line that are located in each row of subarea can be detected. In a second detecting mode, the first to the sixth detecting circuits are divided into two groups, and a second detecting signal is provided to the two groups of detecting circuits successively, so that a circuit defect possible existing in the charge line and the share line that are located in adjacent rows of subareas can be detected.
1. An array substrate, comprising:
a display area, which includes a plurality of rows of subareas, each row of subarea being provided with a charge line and a share line, wherein the share line located in an N th row of subarea is connected to the charge line located in an (N+J) th row of subarea, N being a positive number while J being a positive even number, and
a detecting area, which includes six detecting circuits from a first detecting circuit to a sixth detecting circuit, connected to the charge lines located in six successive rows of subareas in the display area in one-to-one correspondence,
wherein in a first detecting mode, the first to the sixth detecting circuits are divided into three groups, and a first detecting signal is provided to the three groups of detecting circuits successively, to detect a circuit defect existing in the charge line and the share line that are located in each row of subarea, and
wherein in a second detecting mode, the first to the sixth detecting circuits are divided into two groups, and a second detecting signal is provided to the two groups of detecting circuits successively, to detect a circuit defect existing in the charge lines and the share lines that are located in adjacent rows of subareas.
2. The array substrate according to claim 1 , wherein in the first detecting mode, the three groups of detecting circuits include a group consisting of the first and the fourth detecting circuits, a group consisting of the second and the fifth detecting circuits, and a group consisting of the third and the sixth detecting circuits.
3. The array substrate according to claim 2 , wherein when the first detecting signal is in effect, a difference value between and among row numbers of subareas that receive the first detecting signal via corresponding charge lines is a multiple of 3.
4. The array substrate according to claim 2 , wherein J is 2 or 4.
5. The array substrate according to claim 3 , wherein J is 2 or 4.
6. The array substrate according to claim 1 , wherein in the second detecting mode, the two groups of detecting circuits include a group consisting of the first, the third, and the fifth detecting circuits, and a group consisting of the second, the fourth, and the sixth detecting circuits.
7. The array substrate according to claim 6 , wherein J is 2 or 4.
8. A method for detecting an array substrate, comprising:
providing a display area, which includes a plurality of rows of subareas, each row of subarea being provided with a charge line and a share line, wherein the share line located in an N th row of subarea is connected to the charge line located in an (N+J) th row of subarea, N being a positive number while J being a positive even number,
providing a detecting area, which includes six detecting circuits from a first detecting circuit to a sixth detecting circuit, connected to the charge lines located in six successive rows of subareas in the display area in one-to-one correspondence,
dividing, in a first detecting mode, the first to the sixth detecting circuits into three groups, and providing a first detecting signal to the three groups of detecting circuits successively, to detect a circuit defect existing in the charge line and the share line that are located in each row of subarea, and
dividing, in a second detecting mode, the first to the sixth detecting circuits into two groups, and providing a second detecting signal to the two groups of detecting circuits successively, to detect a circuit defect existing in the charge lines and the share lines that are located in adjacent rows of subareas.
9. The method according to claim 8 , wherein in the first detecting mode, the three groups of detecting circuits include a group consisting of the first and the fourth detecting circuits, a group consisting of the second and the fifth detecting circuits, and a group consisting of the third and the sixth detecting circuits.
10. The method according to claim 9 , wherein when the first detecting signal is in effect, a difference value between and among row numbers of subareas that receive the first detecting signal via corresponding charge lines is a multiple of 3.
11. The method according to claim 9 , wherein J is 2 or 4.
12. The method according to claim 10 , wherein J is 2 or 4.
13. The method according to claim 8 , wherein in the second detecting mode, the two groups of detecting circuits include a group consisting of the first, the third, and the fifth detecting circuits, and a group consisting of the second, the fourth, and the sixth detecting circuits.
14. The method according to claim 13 , wherein J is 2 or 4.