IP Library Granted Patent US 9,268,559
Granted Patent B2
US 9,268,559 · App. 14/417,639 · Granted Feb 23, 2016

System for detecting call stack tampering

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,268,559
App. No.
14/417,639
Granted
Feb 23, 2016
Kind
B2
Abstract

The invention relates to a method for detecting a subroutine call stack modification, including the steps of, when calling a subroutine, placing a return address at the top of the stack; at the end of the subroutine, using the address at the top of the stack as the return address, and removing the address from the stack; when calling the subroutine, accumulating the return address in a memory location with a first operation; at the end of the subroutine, accumulating the address from the top of the stack in the memory location with a second operation, reciprocal of the first operation; and detecting a change when the content of the memory location is different from its initial value.

Claims (43)

1. A method for detecting a subroutine call stack modification, comprising:

for each subroutine in a sequence of subroutines nested in an initial subroutine:

when calling a current subroutine, placing a return address at the top of the stack;

at an end of the current subroutine, using an address at the top of the stack as the return address, and removing the address from the stack;

assigning a single memory location to the sequence of subroutines;

saving an initial value of the single memory location before calling the initial subroutine;

when calling the current subroutine, accumulating the return address in the single memory location using a first operation;

at an end of the current subroutine, accumulating the address from the top of the stack in the single memory location using a second operation, wherein the second operation is reciprocal of the first operation; and

upon returning from the initial subroutine, detecting a subroutine call stack modification when the content of the single memory location differs from the initial value.

2. The method of claim 1 , wherein the first and second operations are a bitwise exclusive-OR.

3. The method according to claim 2 , wherein the initial value is random.

4. The method of claim 1 , wherein the first and second operations are addition and subtraction.

5. The method according to claim 4 , wherein the initial value is random.

6. The method according to claim 1 , wherein the return address and the address at the top of the stack are values taken from a memory bus during access transactions to the stack.

7. The method according to claim 6 , wherein the initial value is random.

8. The method according to claim 1 , wherein the initial value is random.

9. A device for detecting a subroutine call stack modification, comprising:

a processor configured to:

store at a memory location an initial value;

an operator circuit configured to:

replace a current value of the memory location with a result of an operation between the content of the memory location and the current value exchanged with a call stack; and

a detection circuit configured to identify a currently executed instruction and:

if the identified instruction is a subroutine call, configuring the operator circuit to perform a first type of operation, and

if the identified instruction is a subroutine return, configuring the operator circuit to perform a second type of operation that is a reciprocal operation of the first type of operation, wherein the processor is further configured to determine if the content of the first memory location differs from the initial value, and if so, detect a subroutine call stack modification.

10. The device according to claim 9 , wherein the first and second types of operation are an exclusive-OR operation.

11. The device according to claim 9 , wherein the first and second types of operation are addition and subtraction.

12. A method for detecting a subroutine call stack modification, comprising:

(A) assigning a single memory location or register dedicated to a sequence of subroutines;

(B) storing an initial value to the single memory location or register before calling any subroutine of the sequence of subroutines;

(C) for each subroutine in the sequence of subroutines:

(i) placing a return address of the subroutine at the top of a stack;

(ii) calculating an accumulation value using a first accumulating operation performed between the content of the single memory location or register and the return address of the subroutine;

(iii) updating the content of the single memory location or register with the calculated accumulation value;

(iv) calling any nested subroutines in the subroutine; and

(v) when the subroutine ends or a return instruction is received:

calculating a de-accumulation value using a de-accumulating operation that is reciprocal of the first operation and that is performed between the content of the single memory location or register and the current address at the top of the stack; and

continuing execution from the address at the top of the stack/using an address at the top of the stack as the return address, and removing the address from the stack;

(D) determining whether the content of the single memory location or register differs from the initial value; and

(E) if the content of the single memory location or register differs from the initial value, transmit or store an indication that a subroutine call stack modification has been detected.

13. The method of claim 12 , wherein the first and second operations are a bitwise exclusive-OR.

14. The method of claim 13 , wherein the first and second operations are addition and subtraction.

15. The method according to claim 14 , wherein the return address and the address at the top of the stack are values taken from a memory bus during access transactions to the stack.

16. The method according to claim 15 , wherein the initial value is random.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2019
From: VERIMATRIX
To: RAMBUS INC.
Reel/Frame 051262/0413 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Nov 21, 2019
From: GLAS SAS, AS AGENT
To: INSIDE SECURE
Reel/Frame 051076/0306 →
CHANGE OF ADDRESS Recorded Oct 16, 2019
From: VERIMATRIX
To: VERIMATRIX
Reel/Frame 050733/0003 →
CHANGE OF NAME Recorded Oct 7, 2019
From: INSIDE SECURE
To: VERIMATRIX
Reel/Frame 050647/0428 →
SECURITY INTEREST Recorded Feb 27, 2019
From: INSIDE SECURE
To: GLAS SAS, AS SECURITY AGENT
Reel/Frame 048449/0887 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2015
From: GALDO, FLORIAN
To: INSIDE SECURE
Reel/Frame 034820/0746 →