IP Library Granted Patent US 9,325,553
Granted Patent B2
US 9,325,553 · App. 14/421,886 · Granted Apr 26, 2016

Direct conversion receiver circuit for concurrent reception of multiple carriers

Inventors: Jouni Kristian Kaukovuori (Vantaa, FI); Jonne Juhani Riekki (Espoo, FI); Jari Johannes Heikkinen (Helsinki, FI); Aarno Tapio Parssinen (Espoo, FI); Pauli Mikael Seppinen (Vantaa, FI)
Assignee: BROADCOM CORPORATION
H04L27/2647H04B7/12H04J11/0063
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,325,553
App. No.
14/421,886
Granted
Apr 26, 2016
Kind
B2
Abstract

A receiver circuit comprising a connection portion for guiding each one of a first predefined number of carrier signals of multiple carriers to one of a number of receive branches, each receive branch comprising at least one amplifier load structure, the number of receive branches being equal to the first predefined number. The receiver circuit also comprises a mixing portion for generating a second predefined number of mixed carrier signals on each receive branch by mixing a carrier signal on each one of the receive branches with a number of local oscillator frequencies equal to the second predefined number, and a selection portion for selecting one of the second predefined number of mixed carrier signals on each receive branch to be output via a number of output paths equal to the first predetermined number to a digital data path.

Claims (49)

1. A receiver circuit at a terminal in a communication system, the receiver circuit comprising:

an input portion configured to input a plurality of carrier signals of multiple carriers via a plurality of amplifier input stages;

a connection portion configured to guide each one of a first predefined number of carrier signals in the plurality of carrier signals to one of a number of receive branches, each of the receive branches comprising at least one amplifier load structure, the number of the receive branches being equal to the first predefined number;

a mixing portion configured to generate a second predefined number of mixed carrier signals on each of the receive branches by mixing one of the carrier signals on each one of said receive branches with a number of local oscillator frequencies equal to the second predefined number, wherein at least two of the local oscillator frequencies are different from each other;

a selection portion configured to select one of the second predefined number of the mixed carrier signals on each of the receive branches; and

an output portion configured to output a number of the selected mixed carrier signals on the receive branches via a number of output paths to a digital data path, the number of the selected mixed carried signals being equal to the first predetermined number, and the number of the output paths being equal to the first predetermined number.

2. A receiver circuit according to claim 1 , wherein the input portion comprises a number of input groups equal to the first predefined number, each of the input groups comprising one or more of the amplifier input stages configured to input the carrier signals of a specific carrier.

3. A receiver circuit according to claim 1 , wherein the connection portion comprises a multiplexer configured to electrically connect each one of the first predefined number of the amplifier input stages with one of the first predefined number of receive branches.

4. A receiver circuit according to claim 1 , wherein the mixing portion comprises:

a number of mixer banks equal to the first predefined number, each of the mixer banks comprising a number of mixers equal to the second predefined number, each of the mixers being configured to mix one of the carrier signals with one of the second predefined number of the local oscillator frequencies, and

a number of local oscillators equal to the second predefined number, each of the local oscillators being configured to generate one of the second predefined number of the local oscillator frequencies,

wherein each local oscillator is connectable with one of the mixers in each of the mixer banks.

5. A receiver circuit according to claim 4 , wherein the selection portion comprises a multiplexer configured to electrically connect one of the mixers in each of the mixer banks with one of the first predefined number of the output paths.

6. A receiver circuit according to claim 1 , wherein:

the connection portion is configured to guide a first carrier signal of the multiple carriers and a second carrier signal of the multiple carriers to two of the receive branches,

the mixing portion comprises a local oscillator for each of the receive branches, and

each of the receive branches comprises a low-band amplifier load structure for low-band carriers and a high-band amplifier load structure for high-band carriers.

7. A receiver circuit according to claim 1 , wherein:

the connection portion is configured to guide a first carrier signal and a second carrier signal of the multiple carriers to two of the receive branches,

the mixing portion comprises a local oscillator for each of the receive branches, and

one of the two receive branches comprises a low-band amplifier load structure for low-band carriers and a high-band amplifier load structure for high-band carriers, and another receive branch of the two receive branches comprises a wide-band amplifier load structure for low-band and high-band carriers.

8. A receiver circuit according to claim 1 , wherein:

the connection portion is configured to guide a first carrier signal and a second carrier signal of the multiple carriers to two of the receive branches,

the mixing portion comprises a local oscillator for each of the receive branches, and each of the two receive branches comprises a wide-band amplifier load structure for low-band and high-band carriers.

9. A receiver circuit according to claim 8 , wherein each of the wide-band amplifier load structures comprises a wide-tuning-range narrow-band adjustable load.

10. A receiver circuit according to claim 9 , wherein each of the wide-tuning-range narrow-band adjustable loads comprises an LC resonator with variable inductance and capacitance values or a tapped inductor with a variable short-circuiting part.

11. A receiver circuit according to claim 6 , further comprising a signal path between one of the two receive branches and a second of the two receive branches between the selection portion and the output portion of the receive branches, which is configured to additionally guide the selected mixed carrier signal of the one receive branch to the second receive branch, wherein the output portion of the second receive branch comprises:

a switch configured to choose between the selected mixed carrier signal of the one receive branch and the selected mixed carrier signal of the second receive branch for output, and

an adaptive filter configured to filter adaptively the chosen mixed carrier signal by band-pass filtering or low-pass filtering.

12. A receiver circuit according to claim 11 , wherein the output portion of the one receive branch comprises an adaptive filter configured to adaptively filter the selected mixed carrier signal of the one receive branch by band-pass filtering or low-pass filtering.

13. A receiver circuit according to claim 1 , further comprising a controller portion configured to control at least one of the connection portion or the selection portion, in order to determine a receiver chain configuration from the input portion to the output portion on the basis of at least one of: received signal strength of the carrier signals of the multiple carriers, activity of a transmitter circuit, or interference properties of the multiple carriers.

14. A receiver circuit according to claim 13 , wherein the controller portion is configured to determine, for a particular carrier of the multiple carriers which is expected to have a stronger transmit leakage at an amplifier input stage than at least one other carrier of the multiple carriers, the receiver chain configuration having at least one of: improved selectivity, blocking immunity, or spurious response rejection.

15. A receiver circuit according to claim 13 , wherein the controller portion is configured to determine, for a particular carrier of the multiple carriers which is expected to cause interference in the mixing portion, the receiver chain configuration having better interference performance and/or a narrow-band resonator with an interference trap as the amplifier load structure in the receive branch of the receiver chain configuration.

16. A receiver circuit according to claim 1 , wherein:

the multiple carriers comprise different frequency carriers in a single frequency band or multiple frequency bands, and

the different frequency carriers comprise carriers in at least one of a cellular communication system, positioning radio systems, connectivity radio systems, and systems with different radio access technologies.

17. A receiver circuit according to claim 1 , wherein:

the receiver circuit is embodied in a radio frequency integrated circuit, or

the receiver circuit constitutes a direct conversion receiver.

18. A receiver at a terminal in a communication system, comprising at least two receiver circuits, each of the receiver circuits being according to claim 1 .

19. The receiver according to claim 18 , wherein:

the receiver comprises a diversity receiver, or

at least one of the receiver circuits constitutes a main receiver part and at least one other of the receiver circuits constitutes a diversity receiver part.

20. A method of operating a receiver circuit at a terminal in a communication system, the method comprising:

inputting a plurality of carrier signals of multiple carriers via a plurality of amplifier input stages;

guiding each one of a first predefined number of carrier signals in the plurality of carrier signals to one of a number of receive branches, each of the receive branches comprising at least one amplifier load structure, and the number of the receive branches being equal to the first predefined number;

generating a second predefined number of mixed carrier signals on each of the receive branches by mixing one of the carrier signals on each one of the receive branches with a number of local oscillator frequencies equal to the second predefined number, wherein at least two of the local oscillator frequencies are different from each other;

selecting one of the second predefined number of the mixed carrier signals on each of the receive branches; and

outputting a number of the selected mixed carrier signals on the receive branches via a number of output paths to a digital data path, the number of the selected mixed carried signals being equal to the first predetermined number, and the number of the output paths being equal to the first predetermined number.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: BROADCOM INTERNATIONAL LIMITED
To: BROADCOM CORPORATION
Reel/Frame 038200/0198 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: RENESAS MOBILE CORPORATION
To: BROADCOM INTERNATIONAL LIMITED
Reel/Frame 038200/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: KAUKOVUORI, JOUNI KRISTIAN; RIEKKI, JONNE JUHANI; HEIKKINEN, JARI JOHANNES; PARSSINEN, AARNO TAPIO; SEPPINEN, PAULI MIKAEL
To: RENESAS MOBILE CORPORATION
Reel/Frame 038062/0076 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
Priority Claims (1)
GB 1214562.9 · Aug 15, 2012 · national
Continuity (1)
Related Publication 20150236887A1 · Aug 20, 2015