Image display apparatus
View Patent ↗The first and second gate driver circuits each include N shift register units. An M1th (M1 is an integer not less than one and not more than L) stage of each of a first to Nth ones of the shift register units of the first gate driver circuit is connected to a first to Nth ones of the gate signal lines in an M1th one of the effective pixel rows. An M2th (M2 is an integer not less than one and not more than L×a/N) stage of each of a (a+1)th to Nth ones of the shift register circuits of the second gate driver circuit is connected to a first to ath ones of the gate signal lines in one of the L effective pixel rows other than an M2th one of the L effective pixel rows.
1. An image display apparatus comprising:
a display screen including pixels arranged in a matrix and L effective pixel rows, where L is an integer not less than 2, each of the pixels having a light-emitting element;
N gate signal lines disposed for each of the L effective pixel rows, where N is an integer not less than two;
a source signal line disposed for each pixel column;
a first gate driver circuit;
a second gate driver circuit; and
a source driver circuit which outputs a video signal to the source signal line,
wherein the first gate driver circuit and the second gate driver circuit each include N shift register circuits,
among the N gate signal lines disposed for each of the L effective pixel rows, each of a gate signal lines has one end connected to the first gate driver circuit and an other end connected to the second gate driver circuit, where a is an integer not less than one and not more than (N−1),
an M1th stage of each of a first to Nth ones of the N shift register circuits of the first gate driver circuit is electrically connected to a first to Nth ones of the N gate signal lines in an M1th one of the L effective pixel rows, where M1 is an integer not less than one and not more than L, and
an M2th stage of each of a (a+1)th to Nth ones of the N shift register circuits of the second gate driver circuit is electrically connected to a first to ath ones of the N gate signal lines in one of the L effective pixel rows other than an M2th one of the L effective pixel rows, where M2 is an integer not less than one and not more than L×a/N.
2. The image display apparatus according to claim 1 ,
wherein each of the first gate driver circuit and the second gate driver circuit:
includes a control terminal;
has a first operation mode in which a scanning signal including an ON voltage and a first OFF voltage is applied to the N gate signal lines;
has a second operation mode in which a scanning signal including the ON voltage, the first OFF voltage, and a second OFF voltage is applied to the N gate signal lines; and
selects one of the first operation mode and the second operation mode based on a logic signal applied to the control terminal of each of the first gate driver circuit and the second gate driver circuit.
3. The image display apparatus according to claim 1 ,
wherein an operation clock of each of the N shift register circuits of the first gate driver circuit is different from
an operation clock of each of N shift register circuits of the second gate driver circuit.
4. The image display apparatus according to claim 1 ,
wherein each of the pixels includes a switching transistor to which a video signal transmitted from the source driver circuit is applied, and
a scanning signal including an ON voltage, a first OFF voltage, and a second OFF voltage is applied to one of the N gate signal lines to which a gate terminal of the switching transistor is connected.
5. The image display apparatus according to claim 1 ,
wherein each of the pixels includes a switching transistor to which a video signal transmitted from the source driver circuit is applied, and
the switching transistor includes a gate terminal connected to a corresponding one of the N gate signal lines having one end connected to the first gate driver circuit and an other end connected to the second gate driver circuit.
6. The image display apparatus according to claim 1 ,
wherein each of the first gate driver circuit and the second gate driver circuit has a function of inverting a scanning direction.
7. The image display apparatus according to claim 1 ,
wherein the light-emitting element is an EL (electroluminescence) display element.
8. An image display apparatus comprising:
a display screen including pixels arranged in a matrix, each of the pixels having a light-emitting element;
a first gate signal line and a second gate signal line each disposed for each pixel row;
a source signal line disposed for each pixel column;
a first gate driver circuit;
a second gate driver circuit; and
a source driver circuit which outputs a video signal to the source signal line,
wherein the first gate driver circuit is connected to one end of each of the first gate signal line and the second gate signal line,
the second gate driver circuit is connected to an other end of the first gate signal line,
the first gate driver circuit and the second gate driver circuit each apply a first scanning signal to the first gate signal line,
the first gate driver circuit applies a second scanning signal to the second gate signal line, and
the first gate driver circuit is configured to be controlled according to a first operation mode in which two voltages are applied to the second gate signal line and a second operation mode in which three voltages are applied to the first gate signal line, with one of the first operation mode and the second operation mode being selected based on a control signal.
9. The image display apparatus according to claim 8 ,
wherein the first gate driver circuit:
includes a control terminal
has the first operation mode in which a scanning signal including an ON voltage and a first OFF voltage is applied to the second gate signal line;
has the second operation mode in which a scanning signal including the ON voltage, the first OFF voltage, and a second OFF voltage is applied to the first gate signal line; and
selects one of the first operation mode and the second operation mode based on a logic signal applied to the control terminal.
10. The image display apparatus according to claim 8 ,
wherein an operation clock of a shift register of the first gate driver circuit is different from an operation clock of a shift register of the second gate driver circuit.
11. The image display apparatus according to claim 8 ,
wherein each of the pixels includes a switching transistor to which a video signal transmitted from the source driver circuit is applied, and
a scanning signal including an ON voltage, a first OFF voltage, and a second OFF voltage is applied to one of the first gate signal line and the second gate signal line to which a gate terminal of the switching transistor is connected.
12. The image display apparatus according to claim 8 ,
wherein each of the pixels includes a switching transistor to which a video signal transmitted from the source driver circuit is applied, and
the switching transistor includes a gate terminal connected to one of the first gate signal line and the second gate signal line having one end connected to the first gate driver circuit and an other end connected to the second gate driver circuit.
13. The image display apparatus according to claim 8 ,
wherein each of the first gate driver circuit and the second gate driver circuit has a function of inverting a scanning direction.
14. The image display apparatus according to claim 8 ,
wherein the light-emitting element is an EL (electroluminescence) display element.
15. An image display apparatus comprising:
a display screen including pixels arranged in a matrix and L effective pixel rows, where L is an integer not less than 2, each of the pixels having a light-emitting element;
N gate signal lines disposed for each of the L effective pixel rows, where N is an integer not less than two;
a source signal line disposed for each pixel column;
a first gate driver circuit;
a second gate driver circuit; and
a source driver circuit which outputs a video signal to the source signal line,
wherein the first gate driver circuit includes a plurality of first shift register circuits each having L stages, and
the second gate driver circuit includes N second shift register circuits each having L/N stages.
16. The image display apparatus according to claim 15 ,
wherein an operation clock of each of the first shift register circuits of the first gate driver circuit is different from
an operation clock of each of the N second shift register circuits of the second gate driver circuit.
17. The image display apparatus according to claim 15 ,
wherein each of the pixels includes a switching transistor to which a video signal transmitted from the source driver circuit is applied, and
a scanning signal including an ON voltage, a first OFF voltage, and a second OFF voltage is applied to one of the N gate signal lines to which a gate terminal of the switching transistor is connected.
18. The image display apparatus according to claim 15 ,
wherein each of the pixels includes a switching transistor to which a video signal transmitted from the source driver circuit is applied, and
the switching transistor includes a gate terminal connected to a corresponding one of the N gate signal lines having one end connected to the first gate driver circuit and an other end connected to the second gate driver circuit.
19. The image display apparatus according to claim 15 ,
wherein each of the first gate driver circuit and the second gate driver circuit has a function of inverting a scanning direction.
20. The image display apparatus according to claim 15 ,
wherein the light-emitting element is an EL (electroluminescence) display element.