IP Library Granted Patent US 9,487,017
Granted Patent B2
US 9,487,017 · App. 14/440,551 · Granted Nov 8, 2016

Fluid ejection device with integrated ink level sensor

Inventors: Ning Ge (Palo Alto, CA); Joseph M. Torgerson (Philomath, OR); Patrick Leonard (Leixlip, IE)
Assignee: Hewlett-Packard Development Company, L.P.
B41J2/17566B41J2/0458B41J2/04541B41J2/1404B41J2/14129B41J2/1753B41J2/17546B41J2002/14354B41J2002/17579
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Quick Facts
Patent No.
US 9,487,017
App. No.
14/440,551
Granted
Nov 8, 2016
Kind
B2
Abstract

In an embodiment, a fluid ejection device includes an ink slot formed in a printhead die. The fluid ejection device also includes a printhead-integrated ink level sensor (PILS) to sense an ink level of a chamber in fluid communication with the slot, and a clearing resistor circuit disposed within the chamber to clear the chamber of ink.

Claims (49)

1. A fluid ejection device comprising:

an ink slot formed in a printhead die;

a printhead-integrated ink level sensor (PILS) to sense an ink level of a chamber in fluid communication with the slot; and

a clearing resistor circuit disposed within the chamber to clear the chamber of ink.

2. A fluid ejection device as in claim 1 , wherein the clearing resistor circuit comprises four resistors surrounding a sense capacitor plate of the PILS, each resistor adjacent to and aligned parallel with a different side of the sense capacitor plate.

3. A fluid ejection device as in claim 1 , wherein the PILS comprises multiple PILS to sense ink levels in multiple chambers in fluid communication with the slot, the fluid ejection device further comprising:

a shift register to select between the multiple PILS for output onto a common ID line.

4. A fluid ejection device as in claim 3 , wherein the multiple PILS comprise four PILS around a single slot, each of the four PILS located near a different end-corner of the slot.

5. A fluid ejection device as in claim 4 , further comprising a sense capacitor plate in each PILS, wherein each sense capacitor plate is a minimum safe distance of about 40 to about 50 microns from an end of the slot.

6. A fluid ejection device as in claim 3 , further comprising a controller to control activation of the clearing resistor circuit and to control the shift register to select between the multiple PILS for output onto a common ID line.

7. A fluid ejection device as in claim 1 , wherein the PILS comprises:

a sense capacitor whose capacitance changes with the ink level in the chamber;

a switch T 2 to apply a voltage Vp to the sense capacitor, placing a charge on the sense capacitor;

a switch T 3 to share the charge between the sense capacitor and a reference capacitor, resulting in a reference voltage Vg; and

an evaluation transistor configured to provide a drain to source resistance in proportion to the reference voltage.

8. The fluid ejection device as in claim 7 , further comprising:

a processor-readable medium storing code representing instructions that when executed by a processor of the fluid ejection device cause the processor to:

activate the clearing resistor circuit to purge ink from the chamber;

apply a pre-charge voltage Vp to the sense capacitor within the chamber to charge the sense capacitor with a charge Q 1 ;

share charge Q 1 between the sense capacitor and the reference capacitor, causing a reference voltage Vg at a gate of the evaluation transistor; and

determine a resistance from drain to source of the evaluation transistor that results from Vg.

9. The fluid ejection device as in claim 8 , wherein the instructions further cause the processor to:

provide a delay after activating the clearing resistor circuit to enable ink from a fluid slot to flow back into the chamber prior to applying the pre-charge voltage Vp.

10. A fluid ejection device as in claim 1 , further comprising a parasitic elimination circuit to eliminate intrinsic parasitic capacitance of the PILS.

11. The fluid ejection device as in claim 1 , further comprising a processor-readable medium storing code representing instructions that when executed by a processor of the fluid ejection device cause the processor to:

initiate operation of multiple PILS (printhead-integrated ink level sensors) to sense an ink level at multiple areas of the fluid ejection device; and

control a shift register on the fluid ejection device to multiplex outputs from the multiple PILS onto a common ID line.

12. The fluid ejection device as in claim 11 , wherein the instructions further cause the processor to determine the ink level using the outputs from the multiple PILS.

13. The fluid ejection device as in claim 12 , wherein determining the ink level comprises averaging the multiple outputs from the multiple PILS.

14. The fluid ejection device as in claim 11 , wherein operation of a PILS comprises:

placing a charge on a sense capacitor at a memory node M 1 ;

coupling M 1 to a second memory node M 2 to share the charge between the sense capacitor and a reference capacitor, the shared charge causing a reference voltage Vg at M 1 , M 2 , and a transistor gate;

determining a resistance across the transistor drain to source; and

comparing the resistance to a reference value to determine an ink level.

15. The fluid ejection device as in claim 14 , wherein operation of a PILS further comprises:

applying a voltage Vp to M 1 to place the charge on the sense capacitor; and

simultaneously applying Vp to a node Mp to prevent a parasitic capacitance charge from developing between M 1 and Mp.

16. A fluid ejection device comprising:

a printhead substrate having a fluid slot formed therein;

at least one fluid drop generator integrated on the substrate, the at least one fluid drop generator having a first fluid chamber fluidly connected to the fluid slot, and the at least one drop generator to eject drops of fluid from the first fluid chamber; and

at least one printhead-integrated ink level sensor integrated on the substrate, the at least one print-head integrated ink level sensor having a second fluid chamber fluidly connected to the fluid slot, and the at least one printhead-integrated ink level sensor to sense an ink level of the second fluid chamber, and

a clearing resistor circuit disposed within the second fluid chamber, wherein the clearing resistor circuit is to clear the second fluid chamber of ink.

17. The fluid ejection device of claim 16 , wherein the at least one printhead-integrated ink level sensor comprises:

a sense capacitor disposed within the second fluid chamber, wherein the ink level of the second fluid chamber is sensed based at least in part on a capacitance value of the sense capacitor.

18. The fluid ejection device of claim 16 , wherein the at least one fluid drop generator comprises:

a nozzle formed therein and fluidly connected with the first fluid chamber; and

a firing element disposed in the first fluid chamber to eject the drops of fluid from the first fluid chamber via the nozzle.

19. The fluid ejection device of claim 16 , wherein the at least one printhead-integrated ink level sensor comprises a first printhead-integrated ink level sensor and a second printhead-integrated ink level sensor, and the fluid ejection device further comprises:

a shift register integrated on the printhead substrate to enable multiplexed selection of the first printhead-integrated ink level sensor and the second printhead-integrated ink level sensor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2015
From: GE, NING; TORGERSON, JOSEPH M.; LEONARD, PATRICK
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 035559/0939 →
Continuity (1)
Related Publication 20150273848A1 · Oct 1, 2015