Grain growth for solar cells
View Patent ↗A solar cell can include a silicon layer formed over a silicon substrate. The silicon layer can have a P-type doped region and an N-type doped region. Portions of the silicon layer can have a grain size larger than other portions of the silicon layer. For example, larger grains of the silicon layer formed within a depletion region between P-type and N-type doped regions can minimize recombination loss at the P-type and N-type doped region boundaries and improve solar cell efficiency.
1. A method of fabricating a solar cell, the method comprising:
forming upper regions, angled regions and lower regions of a silicon substrate, wherein the upper regions and the lower regions are substantially coplanar;
forming a silicon layer over the silicon substrate;
applying a laser to the silicon layer resulting in portions of the silicon layer over the upper regions and lower regions having a larger grain size than other portions of the silicon layer over angled regions of the silicon substrate; and
driving dopants into the silicon layer resulting in P-type doped regions and N-type doped regions, the P-type doped regions and N-type doped regions abutting in a contiguous portion of the silicon layer.
2. The method of claim 1 , wherein forming upper regions, angled regions and lower regions comprises performing an etching process on the silicon substrate.
3. The method of claim 2 , wherein performing the etching process comprises etching with potassium hydroxide (KOH).
4. The method of claim 1 , further comprising forming a dielectric region between the silicon layer and the silicon substrate.
5. The method of claim 1 , wherein applying a laser comprises applying a pulsed laser or a continuous wave laser.
6. The method of claim 1 , wherein applying a laser comprises melting portions of the silicon layer.
7. The method of claim 1 , wherein applying a laser comprises applying a laser with a top-hat profile on the on the silicon layer.
8. The method of claim 1 , wherein forming a silicon layer comprises forming an amorphous silicon layer or a polysilicon layer.
9. A method of fabricating a solar cell, the method comprising:
forming upper regions, angled regions and lower regions of a silicon substrate, wherein the upper regions and the lower regions are substantially coplanar;
forming a silicon layer over the silicon substrate; and
applying a laser to the silicon layer resulting in P-type doped regions and N-type doped regions and portions of the silicon layer over the upper regions and lower regions having a larger grain size than other portions of the silicon layer over angled regions of the silicon substrate, the larger grain size formed in a contiguous portion of the silicon layer where the P-type doped regions and N-type doped regions abut.
10. The method of claim 9 , wherein forming upper regions, angled regions and lower regions comprises performing an etching process on the silicon substrate.
11. The method of claim 10 , wherein performing the etching process comprises etching with potassium hydroxide (KOH).
12. The method of claim 9 , further comprising forming a dielectric between the silicon layer and the silicon substrate.
13. The method of claim 9 , wherein applying a laser comprises applying a pulsed laser or a continuous wave laser.
14. The method of claim 9 , wherein applying a laser comprises:
driving dopants into the silicon layer using a laser resulting in P-type doped regions and N-type doped regions; and
melting the portions of the silicon layer using the laser in a single step as the driving, the melting resulting in portions of the silicon layer over the upper regions and lower regions having a larger grain size than other portions of the silicon layer and the larger grain size formed in a contiguous portion of the silicon layer where the P-type doped regions and N-type doped regions abut.
15. The method of claim 9 , wherein applying a laser comprises applying a laser with a top-hat profile on the on the silicon layer.
16. The method of claim 9 , wherein forming a silicon layer comprises forming an amorphous silicon layer or a polysilicon layer.