IP Library Granted Patent US 9,275,740
Granted Patent B2
US 9,275,740 · App. 14/451,176 · Granted Mar 1, 2016

Method and apparatus for improving data integrity using threshold voltage recalibration

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Quick Facts
Patent No.
US 9,275,740
App. No.
14/451,176
Granted
Mar 1, 2016
Kind
B2
Abstract

A non-volatile (“NV”) memory device is able to enhance data integrity using threshold voltage (“Vt”) recalibration based on a selected scheme. Upon receiving a command for reading a data page, the process, in one embodiment, identifies a reference page which is located at a predefined location in a block of the NV memory. After reading the first reference data from the reference page by a reader in response to a first or current Vt, a first bit error rate (“BER”) is generated based on the comparison between the first reference data and the predefined known data pattern. If the first BER is greater than a predefined BER target, a second Vt is subsequently calculated in accordance with the first Vt. When the second BER is equal to or less than the predefined BER target, an optimal Vt is set to the second Vt. There are also two other methods using DC balance coding scheme and counting the number of 1's in the selected data page can be used in recalibrating the threshold voltage.

Claims (39)

1. A method able to recalibrate threshold voltage, comprising:

identifying a reference page storing at a predefined location in a block of a non-volatile (“NV”) memory after receiving a read command;

reading first reference data from the reference page by a reader in response to a first threshold voltage;

generating a first bit error rate (“BER”) based on comparison between the first reference data and a predefined known data pattern;

calculating a second threshold voltage in accordance with the first threshold voltage if the first BER is greater than a predefined BER target; and

setting reference threshold voltage to the second threshold voltage when the second BER is less than the predefined BER target.

2. The method of claim 1 , further comprising:

reading second reference data from the reference page by the reader in response to the second threshold voltage; and

generating a second BER based on comparison between the second reference data and the predefined known data pattern.

3. The method of claim 2 , further comprising calculating a third threshold voltage in accordance with the second threshold voltage if the second BER is greater than the predefined BER target.

4. The method of claim 2 , further comprising setting reference threshold voltage to the second threshold voltage when the second BER is equal to the predefined BER target.

5. The method of claim 2 , further comprising setting reference threshold voltage to the second threshold voltage when the second BER is less than the predefined BER target.

6. The method of claim 1 , further comprising storing the reference page containing a checkerboard data pattern at the predefined location in the block of the NV memory after receiving a command to write the block.

7. The method of claim 1 , wherein identifying the reference page storing at the predefined location in the block of the NV memory includes identifying a first reference page containing checkerboard data pattern from a flash memory based solid state drive (“SSD”).

8. The method of claim 1 , wherein the calculating a second threshold voltage in accordance with the first threshold voltage includes determining a new threshold voltage based on a predefined midpoint voltage incremental process.

9. A method for modifying threshold voltage, comprising:

identifying a data page in a block of a non-volatile (“NV”) memory after receiving a command to read the block;

reading a first predefined set of data from the data page by a reader in response to a first threshold voltage;

generating a first bit error rate (“BER”) based on a predefined direct-current (“DC”) balance coding scheme;

calculating a second threshold voltage in accordance with the first threshold voltage if the first BER is greater than a predefined BER target;

reading a second predefined set of data from the data page by the reader in response to the second threshold voltage; and

generating a second BER based on the predefined DC balance coding scheme.

10. The method of claim 9 , further comprising calculating a third threshold voltage in accordance with the second threshold voltage if the second BER is greater than the predefined BER target.

11. The method of claim 9 , further comprising setting reference threshold voltage to the second threshold voltage when the second BER is equal to the predefined BER target.

12. The method of claim 9 , further comprising setting reference threshold voltage to the second threshold voltage when the second BER is less than the predefined BER target.

13. The method of claim 9 , wherein generating a first BER based on a predefined DC balance coding scheme includes counting one's (1's) and zero's (0's) in the first predefined set of data formatted in a eight(8) bits/ten (10) bits DC balance coding scheme.

14. A method configured to optimize threshold voltage, comprising:

identifying a data page in a block of a non-volatile (“NV”) memory after receiving a command to read the data page;

reading a first data from the data page by a reader in response to a first threshold voltage and counting number of one's (1's) within the first data ;

fetching a counting metadata associated with the data page from the block and identifying an original count from the counting metadata;

generating a first bit error rate (“BER”) based on comparison between the number of 1's in the first data and the original count; and

calculating a second threshold voltage in accordance with the first threshold voltage if the first BER is greater than a predefined BER target.

15. The method of claim 14 , further comprising:

reading a second data from the data page by the reader in response to the second threshold voltage;

counting number of one's (1's) within the second data; and

generating a second BER based on comparison between the number of 1's in the second data and the original count.

16. The method of claim 15 , further comprising calculating a third threshold voltage in accordance with the second threshold voltage if the second BER is greater than the predefined BER target.

17. The method of claim 15 , further comprising setting reference threshold voltage to the second threshold voltage when the second BER is equal to the predefined BER target.

18. The method of claim 15 , further comprising setting reference threshold voltage to the second threshold voltage when the second BER is less than the predefined BER target.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2022
From: CNEX LABS, INC.
To: POINT FINANCIAL, INC.
Reel/Frame 058951/0738 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2021
From: CNEX LABS, INC.
To: POINT FINANCIAL, INC
Reel/Frame 058266/0086 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2014
From: HUANG, YIREN RONNIE
To: CNEXLABS, INC.
Reel/Frame 033458/0717 →