IP Library Granted Patent US 9,753,886
Granted Patent B2
US 9,753,886 · App. 14/452,620 · Granted Sep 5, 2017

Communication on an I2C bus

Inventor: Francois Tailliet (Fuveau, FR)
Assignee: STMICROELECTRONICS (ROUSSET) SAS
G06F13/4282G06F13/4068G06F13/4291G06F2213/0016
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Quick Facts
Patent No.
US 9,753,886
App. No.
14/452,620
Granted
Sep 5, 2017
Kind
B2
Abstract

A communication system includes an I2C bus interconnecting at least one first device and one second device. At least one direct data link, other than the I2C bus, interconnects the first and second devices. The system is configurable to operate in: a first operating mode providing for data only transmission between the first and second devices over the I2C bus; and a second operating mode providing for simultaneous data transmission between the first and second devices over both the I2C bus and said data link.

Claims (32)

1. A communication system, comprising:

an I2C bus comprising a data conductor and a synchronization conductor;

at least one first device directly electrically connected to both the data conductor and the synchronization conductor of the I2C bus;

at least one second device directly electrically connected to both the data conductor and the synchronization conductor the I2C bus;

wherein the connections formed between the at least one first device and the at least one second device by the data conductor and the synchronization conductor are physically and electrically uninterrupted; and

at least one direct data link, other than the data conductor and synchronization conductor of the I2C bus, between the two devices, the at least one direct data link comprising a physically and electrically uninterrupted conductor;

wherein the at least one first device and the at least one second device are configured to communicate data simultaneously over both the I2C bus and the at least one direct data link.

2. The system of claim 1 , having a first operating mode configured for data only transit between the two devices over the I2C bus and a second operating mode configured for simultaneous data transit over both the I2C bus and said direct link.

3. The system of claim 1 , wherein the second operating mode is activated by the first device by switching the states of the direct link(s).

4. The system of claim 1 , wherein said first and second device comprise:

a first input-output terminal intended for an I2C synchronization signal;

a second input-output terminal intended for an I2C data signal;

wherein the first and second input-output terminals are configured for connection to the synchronization conductor and data conductor of the I2C bus; and

at least one third data input-output terminal configured for connection to said direct link.

5. The system of claim 4 , wherein the third data input-output terminal(s) are each directly connected to one of said direct links between devices.

6. The system of claim 4 , further comprising an internal management circuit processing the respective states present on the third terminal(s).

7. The device of claim 4 , wherein one of said first and second devices comprises an EEPROM.

8. A method of communication between a first device and a second device interconnected by an I2C bus and a direct data link, other than the I2C bus, comprising:

setting logic states of signals present on said direct data link to correspond, during a first byte of an I2C frame, to the states of the three bits of rank 1 to 3 of a device selection byte of an I2C frame;

communicating data simultaneously over both the I2C bus and the direct data link.

9. The method of claim 8 , further comprising switching from a first operating mode configured for data only transit between the two devices over the I2C bus and a second operating mode configured for simultaneous data transit over both the I2C bus and said direct link by a state switching of the signal present on the involved direct link during an acknowledgement bit which follows said first byte.

10. The method of claim 9 , wherein said state switching is individualized for each direct link to select the number of direct links used in the second mode.

11. A system, comprising:

a first device having an I2C port and another communications port;

a second device having an I2C port and another communications port;

a I2C bus coupling the I2C ports of the first and second devices, the I2C bus comprising a data conductor and a synchronization conductor;

wherein the data conductor and synchronization conductor directly electrically connect the first device and second device in a physically and electrically uninterrupted manner;

a direct data link coupling the another communications ports of the first and second devices, the direct data link comprising a physically and electrically uninterrupted conductor;

wherein the system is configurable to operate in:

a first operating mode providing for data only transmission between the first and second devices over the I2C bus; and

a second operating mode providing for simultaneous data transmission between the first and second devices over both the I2C bus and said direct data link.

12. The system of claim 11 , wherein one of the first and second devices functions as a master device, and wherein said master device is configured to transmit a slave selection signal on the I2C bus, subsequently receive an acknowledgment on the I2C bus and during the acknowledgment assert a signal on said data link indicating operation in the second operating mode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS (ROUSSET) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063282/0118 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2014
From: TAILLIET, FRANCOIS
To: STMICROELECTRONICS (ROUSSET) SAS
Reel/Frame 033472/0681 →
Priority Claims (1)
FR 13 57876 · Aug 8, 2013 · national
Continuity (1)
Related Publication 20150046627A1 · Feb 12, 2015