IP Library Granted Patent US 9,349,694
Granted Patent B2
US 9,349,694 · App. 14/474,053 · Granted May 24, 2016

Method of manufacturing a semiconductor device

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Quick Facts
Patent No.
US 9,349,694
App. No.
14/474,053
Granted
May 24, 2016
Kind
B2
Abstract

According to one embodiment, a semiconductor device includes a substrate. A semiconductor chip is disposed on a first surface of the substrate. The semiconductor chip is covered with a sealing material. A front surface and a side surface of the sealing material are covered with a conductive film. On an outer edge of a substrate-side of the semiconductor device, a step or a trench is formed.

Claims (12)

1. A method of manufacturing a semiconductor device, the method comprising:

covering a plurality of semiconductor chips disposed on an upper surface of a substrate with a sealing material to form on the upper surface of the substrate a plurality of semiconductor packages to be singulated;

cutting into a lower surface of the substrate to a first depth using a first blade having a first width to form cut regions having the first width;

cutting the sealing material through the cut regions having the first width using a second blade having a second width narrower than the first width to singulate the semiconductor packages;

after singulating the semiconductor packages, placing the plurality of semiconductor packages on a carrier such that a lower surface of the semiconductor packages face the carrier; and

forming a conductive film on an upper surface and side surfaces of the sealing material on the semiconductor packages.

2. The method of claim 1 , further comprising forming the conductive film layer on an upper surface of the carrier in locations adjacent to the semiconductor packages, wherein the conductive film formed on the upper surface of the carrier is discontinuous from the conductive film formed on the side surfaces of the sealing material on the semiconductor packages.

3. The method of claim 2 , further comprising:

forming a plurality of terminals on the lower surface of the substrate of a semiconductor package; and

cutting a groove inwardly of the lower surface adjacent to, and inwardly of, the edge of the substrate of the semiconductor package.

4. The method of claim 1 , further comprising, in the step of cutting into the lower surface of the substrate with the first blade, also cutting an interface material that is between the substrate and the sealing material.

5. The method of claim 1 , wherein the substrate of the semiconductor packages after the cutting has a tapered side surface.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: SHIBUYA, KATSUNORI; HOMMA, SOICHI; TAKANO, YUUSUKE; ISHIDA, SHINPEI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 034140/0262 →