Granted Patent B2

US 9,594,707 · App. 14/474,745 · Granted Mar 14, 2017

Inventors: Michael J Heideman (Roseville, MN); E. Brian Garrett (Salt Lake City, UT); Steven M Wierdsma (Roseville, MN); Carl R Crandall (Roseville, MN)

Assignee: Unisys Corporation

G06F13/28

Abstract

Claims (31)

1. A method for performing data in input/output (I/O) operations using at least one computer network communications link, comprising:

assigning a first block of virtual addresses, equal to the size of available physical memory, for exclusive usage with at least one computer network communications link;

registering the entire first block of virtual addresses prior to an operating system partition performing I/O operations using the at least one computer network communications link, wherein registering comprises setting a plurality of virtual page frame numbers of the first block of virtual addresses to point to distinct pages of physical memory;

performing one or more I/O operations using the at least one computer network communications link and the registered first block of virtual addresses, wherein the one or more I/O operations are performed without each I/O operation being associated with a distinct memory registration or a distinct memory deregistration;

receiving an instruction to perform an I/O operation;

combining the assigned first block of virtual addresses with a block of physical addresses to obtain a combined second block of virtual addresses;

instructing the at least one computer network communications link to perform a direct memory access I/O operation using the combined second block of virtual addresses and the block of physical addresses;

dynamically associating a third block of virtual addresses with the block of physical addresses before instructing the at least one computer network communications link to perform the direct memory access I/O operation; and

disassociating the third block of virtual addresses from the block of physical addresses after the direct memory access I/O operation has been performed.

2. The method of claim 1 , wherein the third block of virtual addresses is not a block of virtual addresses within the assigned first block of virtual addresses.

3. A computer program product, comprising a non-transitory computer-readable medium comprising code to perform the steps of:

assigning a first block of virtual addresses, equal to the size of the physical memory, for exclusive usage with at least one computer network communications link;

registering the entire first block of virtual addresses prior to an operating system partition performing one or more I/O operations are performed without each I/O operation being associated with a distinct memory registration or a distinct memory deregistration, wherein registering comprises setting a plurality of virtual page frame numbers of the first block of virtual addresses to point to distinct pages of physical memory;

performing one or more I/O operations using the at least one computer network communications link and the registered first block of virtual addresses;

receiving an instruction to perform an I/O operation;

combining the assigned first block of virtual addresses with a block of physical addresses to obtain a combined second block of virtual addresses; and

instructing the at least one computer network communications link to perform a direct memory access I/O operation using the combined second block of virtual addresses and the block of physical addresses; and

dynamically associating a third block of virtual addresses with the block of physical addresses before instructing the at least one computer network communications link to perform the direct memory access I/O operation; and

disassociating the third block of virtual addresses from the block of physical addresses after the direct memory access I/O operation has been performed.

4. The computer program product of claim 3 , wherein the third block of virtual addresses is not a block of virtual addresses within the assigned first block of virtual addresses.

5. An apparatus, comprising:

a memory; and

a processor coupled to the memory, the processor configured to execute the steps of:

assigning a first block of virtual addresses, is equal to the size of the physical memory, for exclusive usage with at least one computer network communications link;

registering the entire first block of virtual addresses prior to an operating system partition performing I/O operations using the at least one computer network communications link, wherein registering comprises setting a plurality of virtual page frame numbers of the first block of virtual addresses to point to distinct pages of physical memory; and

performing one or more I/O operations using the at least one computer network communications link and the registered first block of virtual addresses, wherein the one or more I/O operations are performed without each I/O operation being associated with a distinct memory registration or a distinct memory deregistration;

receiving an instruction to perform an I/O operation;

combining the assigned first block of virtual addresses with a block of physical addresses to obtain a combined second block of virtual addresses; instructing the at least one computer network communications link to perform a direct memory access I/O operation using the combined second block of virtual addresses and the block of physical addresses; and

dynamically associating a third block of virtual addresses with the block of physical addresses before instructing the at least one computer network communications link to perform the direct memory access I/O operation; and

disassociating the third block of virtual addresses from the block of physical addresses after the direct memory access I/O operation has been performed.

6. The apparatus of claim 5 , wherein the third block of virtual addresses is not a block of virtual addresses within the assigned first block of virtual addresses.

Assignments (10)

Continuity (1)