Embedded overload protection in delta-sigma analog-to-digital converters
View Patent ↗Delta-sigma modulators do not handle overload well, and often become unstable if the input goes beyond the full-scale range of the modulator. To provide overload protection, an improved technique embeds an overload detector in the delta sigma modulator. When an overload condition is detected, coefficient(s) of the delta sigma modulator is adjusted to accommodate for the overloaded input. The improved technique advantageously allows the delta sigma modulator to handle overload gracefully without reset, and offers greater dynamic range at reduced resolution. Furthermore, the coefficient(s) of the delta sigma modulator can be adjusted in such a way to ensure the noise transfer function is not affected.
1. A method for providing overload protection embedded in a delta-sigma modulator, the method comprising:
detecting an overload condition in the delta-sigma modulator using an overload detector connected to one or more nodes in the delta-sigma modulator; and
in response to detecting the overload condition, adjusting a current gain of a feedback digital-to-analog converter of the delta-sigma modulator, and adjusting a size of a resistor positioned between an output of an amplifier of a front-end of the delta-sigma modulator and a backend of the delta-sigma modulator to compensate for the detected overload condition.
2. The method of claim 1 , wherein:
the overload condition is detected if a signal level at the one or more nodes is above a first threshold or below a second threshold.
3. The method of claim 1 , further comprising:
changing a gain of a signal transfer function of the delta-sigma modulator while keeping a noise transfer function of the delta-sigma modulator or a loop gain of the delta-sigma modulator substantially unchanged.
4. The method of claim 1 , wherein:
adjusting the current gain of the feedback digital-to-analog converter of the delta-sigma modulator increases the current gain and adjusting the size of the resistor substantially preserves a loop gain of the delta-sigma modulator.
5. The method of claim 1 , wherein:
adjusting the current gain of the feedback digital-to-analog converter increases the current gain and adjusting the size of the resistor increases the size of the resistor.
6. The method of claim 1 , further comprising:
determining whether the delta-sigma modulator has exited the overload condition for a period of time; and
in response to determining the delta-sigma modulator has exited the overload condition for the period of time, adjusting the delta-sigma modulator to decrease compensation for the overload condition.
7. The method of claim 6 , further comprising:
adjusting the size of a feedback capacitor of the amplifier of the delta-sigma modulator to adjust a gain of an integrator or LC buffer of the delta-sigma modulator.
8. The method of claim 6 , wherein determining whether the delta-sigma modulator has exited the overload condition comprises determining whether one or more signal levels of the one or more nodes of the delta-sigma modulator is within a normal range for the period of time.
9. The method of claim 1 , further comprising:
in response to detecting the overload condition, adjusting a digital gain of a digital output of the delta-sigma modulator in accordance with a predetermined time delay from the adjustment of the delta-sigma modulator, wherein the digital gain corresponds to gain change in a signal transfer function of the delta-sigma modulator resulting from the adjustment of the delta-sigma modulator.
10. An apparatus for providing overload protection, said apparatus embedded in a delta-sigma modulator, the apparatus comprising:
a overload detector connected to one or more nodes in the delta-sigma modulator for detecting an overload condition in the delta-sigma modulator; and
a coefficient controller for adjusting coefficients of the delta-sigma modulator to compensate for the detected overload condition in response to detecting the overload condition, wherein the coefficients comprises: a first coefficient of the coefficients corresponds to a current gain of a feedback digital-to-analog converter of the delta-sigma modulator, and a second coefficient corresponds to a size of a resistor between an output of an amplifier of a front-end of the delta-sigma modulator and a backend of the delta-sigma modulator.
11. The apparatus of claim 10 , wherein the one or more nodes include an input node to the front-end of the delta-sigma modulator.
12. The apparatus of claim 10 , wherein the one or more nodes include an output node of an integrator or LC buffer of the delta-sigma modulator.
13. The apparatus of claim 10 , wherein the one or more nodes include an output of an analog-to-digital converter of the delta-sigma modulator.
14. The apparatus of claim 10 , wherein the one or more nodes include one or more nodes of a first stage of the delta-sigma modulator and one or more nodes of a second stage of the delta-sigma modulator.
15. The apparatus of claim 10 , wherein the overload detector detects an overload condition based on signal levels at a plurality ones of the one or more nodes in the delta-sigma modulator.
16. The apparatus of claim 10 , further comprising:
a return to normal detector for:
determining whether the delta-sigma modulator has exited the overload condition for a period of time; and
in response to determining the delta-sigma modulator has exited the overload condition for the period of time, signaling to the coefficient controller to adjust the coefficients to decrease compensation for the overload condition.
17. A method for providing overload protection, the method comprising:
determining a level from different levels of overload condition of a delta-sigma modulator;
changing internal coefficients of the delta-sigma modulator affecting an analog gain of a signal transfer function of the delta-sigma modulator based on a determined level of overload condition to compensate for the determined level of overload condition while keeping a noise transfer function of the delta-sigma modulator substantially unchanged; and
adjusting a digital gain of a digital output of the delta-sigma modulator corresponding to the analog gain of the signal transfer function affected by the changing of the internal coefficients in accordance with a predetermined time delay of the delta-sigma modulator.
18. The method of claim 17 , wherein the adjusting of the digital gain comprises one or more of: bit shifting and summing.
19. The method of claim 17 , further comprising:
determining whether samples of the digital output are within a predetermined range for a number of samples; and
adjusting the analog gain and the digital gain to decrease compensation for the determined level of overload condition in response to determining that the samples of the digital output are within the predetermined range for the number of samples.
20. The method of claim 17 , wherein determining the level from different levels of overload condition comprises comparing an analog voltage signal at a node of the delta-sigma modulator against a plurality of reference voltages.