IP Library Granted Patent US 9,231,101
Granted Patent B2
US 9,231,101 · App. 14/478,044 · Granted Jan 5, 2016

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 9,231,101
App. No.
14/478,044
Granted
Jan 5, 2016
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate, a body region, a body contact region and a cancelling region each of the first conductivity type, and a buried layer, an epitaxial layer and a source region each of the second conductivity type. A trench is provided in the epitaxial layer from a surface thereof. A gate insulating film is provided on an inner wall of the trench, and a gate electrode made of polycrystalline silicon is in contact with the gate insulating film and fills the trench. The cancelling region, which is provided below a bottom surface of the trench for cancelling a conductivity type of the buried layer, has a distribution center located below a boundary surface between the buried layer and the epitaxial layer. A trench bottom surface lower region of the first conductivity type is provided from the bottom surface of the trench continuously to the cancelling region.

Claims (42)

1. A semiconductor device, comprising:

a semiconductor substrate of a first conductivity type;

a buried layer of a second conductivity type, which is provided on a surface of the semiconductor substrate;

an epitaxial layer of the second conductivity type, which is provided on the buried layer;

a trench provided in the epitaxial layer from a surface of the epitaxial layer;

a cancelling region of the first conductivity type, which is provided below a bottom surface of the trench, for cancelling a conductivity type of the buried layer, the cancelling region having a distribution center located below a boundary surface between the buried layer and the epitaxial layer;

a body region of the first conductivity type, which is provided in the epitaxial layer at a periphery of a side surface of the trench;

a trench bottom surface lower region of the first conductivity type, which is provided from the bottom surface of the trench continuously to the cancelling region;

a gate insulating film provided on an inner wall of the trench;

a gate electrode made of polycrystalline silicon, which is brought into contact with the gate insulating film and fills the trench;

a source region of the second conductivity type, which is provided in a surface of the body region; and

a body contact region of the first conductivity type, which is provided in the surface of the body region.

2. A semiconductor device, comprising:

a semiconductor substrate of a first conductivity type;

a buried layer of a second conductivity type, which is provided on a surface of the semiconductor substrate;

an epitaxial layer of the second conductivity type, which is provided on the buried layer;

a trench provided in the epitaxial layer from a surface of the epitaxial layer;

a body region of the first conductivity type, which is provided in the epitaxial layer at a periphery of a side surface of the trench;

a trench bottom surface lower region of the first conductivity type, which is provided from a bottom surface of the trench to the buried layer;

a gate insulating film provided on an inner wall of the trench;

a gate electrode made of polycrystalline silicon, which is brought into contact with the gate insulating film and fills the trench;

a source region of the second conductivity type, which is provided in a surface of the body region; and

a body contact region of the first conductivity type, which is provided in the surface of the body region,

wherein the buried layer is provided in such a position that a bottom portion of the trench bottom surface lower region is positioned deeper than a bottom portion of the epitaxial layer toward the semiconductor substrate.

3. A semiconductor device, comprising:

a semiconductor substrate of a first conductivity type;

a buried layer of a second conductivity type, which is provided on a surface of the semiconductor substrate;

an epitaxial layer of the second conductivity type, which is provided on the buried layer;

a trench provided in the epitaxial layer from a surface of the epitaxial layer;

a body region of the first conductivity type, which is provided in the epitaxial layer at a periphery of a side surface of the trench;

a trench bottom surface lower region of the first conductivity type, which is provided from a bottom surface of the trench to the buried layer;

a gate insulating film provided on an inner wall of the trench;

a gate electrode made of polycrystalline silicon, which is brought into contact with the gate insulating film and fills the trench;

a source region of the second conductivity type, which is provided in a surface of the body region; and

a body contact region of the first conductivity type, which is provided in the surface of the body region,

wherein a distance from the bottom surface of the trench to the buried layer, which is directly below the trench, is longer than a distance from the body region to the buried layer, which is directly below the body region.

4. A semiconductor device according to claim 1 , wherein the trench bottom surface lower region is disposed between the gate electrode and the buried layer.

5. A semiconductor device according to claim 1 , wherein the epitaxial layer has a concentration of 5×10 16 /cm 3 to 2×10 17 /cm 3 and a thickness of 4.5 μm to 5.0 μm.

6. A semiconductor device according to claim 2 , wherein the epitaxial layer has a concentration of 5×10 16 /cm 3 to 2×10 17 /cm 3 and a thickness of 4.5 μm to 5.0 μm.

7. A semiconductor device according to claim 2 , wherein the trench bottom surface lower region extends into the buried layer.

8. A semiconductor device according to claim 3 , wherein the epitaxial layer has a concentration of 5×10 16 /cm 3 to 2×10 17 /cm 3 and a thickness of 4.5 μm to 5.0 μm.

9. A semiconductor device according to claim 3 , wherein the trench bottom surface lower region extends into the buried layer.

Assignments (2)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →