IP Library Granted Patent US 9,304,853
Granted Patent B2
US 9,304,853 · App. 14/480,599 · Granted Apr 5, 2016

Apparatus, system, and method to increase data integrity in a redundant storage system

Inventors: Jonathan Thatcher (Liberty Lake, WA); David Flynn (Sandy, UT); Joshua Aune (South Jordan, UT); Jeremy Fillingim (Salt Lake City, UT); Bill Inskeep (West Valley City, UT); John Strasser (Syracuse, UT); Kevin Vigor (Salt Lake City, UT)
Assignee: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS 2 LLC
G06F11/1008G06F11/073G06F11/108G06F11/1092H03M13/05H03M13/6502G06F11/0766H03M13/13
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Quick Facts
Patent No.
US 9,304,853
App. No.
14/480,599
Granted
Apr 5, 2016
Kind
B2
Abstract

In various embodiments, an apparatus, system, and method may increase data integrity in a redundant storage system. In one embodiment, a request is received for data stored at a storage system having a plurality of storage elements, where one or more of the plurality of storage elements include parity information. A determination is made that one of the plurality of storage elements is unavailable, the unavailable storage element being a functional storage element and including at least a portion of the data. Responsive to the determination, the data is reconstructed based on at least a portion of the parity information and data from one or more of the plurality of storage elements other than the unavailable storage element; a response is provided to the request such that the response includes the reconstructed data.

Claims (37)

1. An apparatus to increase data read performance in a redundant storage system, the apparatus comprising:

a receive module that receives a read request to read data from an ECC chunk spanning N storage elements of an array of N+P storage elements, the N storage elements each storing a portion of the ECC chunk and P storage elements storing parity data for the N storage elements;

a data read module that reads data from each of X number of storage elements of the N+P storage elements where (N+P)>X≧N;

an ECC correction module that corrects the read data of the ECC chunk using Error Correcting Code (“ECC”) in response to the ECC chunk comprising a number of bit errors below a correctable bit error threshold; and

a substitution module that corrects the read data with substitute data from a substitute storage element in response to the ECC chunk comprising a number of bit errors above a correctable bit error threshold.

2. The apparatus of claim 1 , further comprising a regeneration module that, in response to a portion of the read data comprising parity data, regenerates a missing portion of the ECC chunk using the parity data.

3. The apparatus of claim 2 , wherein the substitution module replaces the regenerated portion of the ECC chunk with the substitute data in response to the read data and the regenerated portion of the ECC chunk comprising a number of bit errors above the correctable bit threshold, the substitute data and read data together comprising a substitute ECC chunk having a number of bit errors below the correctable bit error threshold.

4. The apparatus of claim 2 , wherein the substitution module combines the parity data with the substitute data to produce generated substitute data, the generated substitute data and read data together comprising a substitute ECC chunk having a number of bit errors below the correctable bit error threshold.

5. The apparatus of claim 1 , wherein the substitution module generates a missing portion of the ECC chunk by way of a parity computation comprising the read data and parity data from the substitute storage element, the generated missing portion and read data together comprising a substitute ECC chunk having a number of bit errors below the correctable bit error threshold.

6. The apparatus of claim 1 , further comprising an ECC check module that determines if the number of bit errors are below a correctable bit error threshold.

7. The apparatus of claim 1 , wherein the substitution module generates a substitute ECC chunk from the read data and the substitute data.

8. The apparatus of claim 7 , wherein the substitute ECC chunk comprises a number of errors that are correctable.

9. The apparatus of claim 1 , further comprising a device error determination module that determines which storage element comprises data with the errors.

10. The apparatus of claim 1 , further comprising a periodic read module that periodically reads data from the one or more storage elements not read by the data read module.

11. The apparatus of claim 1 , further comprising a parity rotation module that alternates which storage elements store parity data.

12. The apparatus of claim 11 , wherein the rotation module alternates which storage element stores parity data after a storage space recovery operation.

13. The apparatus of claim 1 , wherein the data read module further comprises a read rotation module that rotates which storage elements the data read module reads.

14. The apparatus of claim 1 , wherein the storage elements of the X storage elements do not store parity data for the ECC chunk.

15. The apparatus of claim 1 , wherein the P number of storage elements that store parity data comprise a data mirror.

16. A system to increase data integrity in a redundant storage system, the system comprising:

a storage controller controlling an array of N storage elements that each store a portion of an ECC chunk and P storage elements storing parity data for the N storage elements;

a receive module that receives a read request to read data from the ECC chunk spanning the array of N+P storage elements;

a data read module that reads data from each of X number of storage elements of the N+P storage elements where X equals N;

an ECC correction module that corrects the read data of the ECC chunk using Error Correcting Code (“ECC”) in response to the ECC chunk comprising a number of bit errors below a correctable bit error threshold; and

a substitution module that corrects the read data with substitute data generated from a substitute storage element in response to the ECC chunk comprising a number of bit errors above a correctable bit error threshold.

17. The system of claim 16 , further comprising a computer in communication with the storage controller, wherein the computer comprises one of:

a computer with an enclosure housing the storage controller and an array of storage elements;

a server sending storage requests to the storage controller; and

a client in communication with and sending storage requests to the storage controller.

18. A method for increasing data integrity in a redundant storage system, the method comprising:

receiving a read request to read data from an ECC chunk spanning N storage elements of an array of N+P storage elements, the N storage elements each storing a portion of the ECC chunk and P storage elements storing parity data for the N storage elements;

reading data from each of X number of storage elements of the N+P storage elements where X equals N;

regenerating a missing portion of the ECC chunk using parity data in response to a portion of the read data comprising the parity data; and

correcting the read data with substitute data from a substitute storage element in response to the ECC chunk comprising a number of bit errors above a correctable bit error threshold.

19. The method of claim 18 , wherein the substitution module generates a substitute ECC chunk from the read data and the substitute data, and wherein the substitute ECC chunk comprises a number of errors that are correctable.

20. The method of claim 18 , further comprising alternating which storage elements store parity data.

21. The method of claim 18 , further comprising rotating which storage elements in a set of N+P storage elements comprise the X storage elements.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 053654 FRAME: 0254. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 15, 2021
From: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
To: UNIFICATION TECHNOLOGIES LLC
Reel/Frame 058134/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 052853 FRAME: 0153. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Nov 15, 2021
From: UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 058223/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2020
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
Reel/Frame 053654/0254 →
PATENT SECURITY AGREEMENT Recorded Jun 5, 2020
From: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MERTON ACQUISITION HOLDCO LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 052853/0153 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: ACACIA RESEARCH GROUP LLC
To: UNIFICATION TECHNOLOGIES LLC
Reel/Frame 052096/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: FIO SEMICONDUCTOR TECHNOLOGIES, LLC
To: ACACIA RESEARCH GROUP LLC
Reel/Frame 052095/0903 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT DOCUMENT FILED PREVIOUSLY RECORDED ON REEL 047702 FRAME 0413. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 16, 2019
From: LONGITUDE ENTERPRISE FLASH S.A.R.I.
To: FIO SEMICONDUCTOR TECHNOLOGIES, LLC
Reel/Frame 048918/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2018
From: LONGITUDE ENTERPRISE FLASH S.A.R.I.
To: FIO SEMICONDUCTOR TECHNOLOGIES LIMITED
Reel/Frame 047702/0413 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2016
From: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS 2 LLC
To: PS12 LUXCO S.A.R.L.
Reel/Frame 038362/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2016
From: PS12 LUXCO S.A.R.L.
To: LONGITUDE ENTERPRISE FLASH S.A.R.L.
Reel/Frame 038362/0604 →
Continuity (3)
Continuation 13321484
Continuation In Part 12468041 · May 18, 2009
Related Publication 20140380130A1 · Dec 25, 2014