IP Library Granted Patent US 9,202,928
Granted Patent B2
US 9,202,928 · App. 14/480,958 · Granted Dec 1, 2015

Thin film semiconductor device and manufacturing method therefor

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Quick Facts
Patent No.
US 9,202,928
App. No.
14/480,958
Granted
Dec 1, 2015
Kind
B2
Abstract

A thin film semiconductor device comprises a substrate, a gate electrode disposed above the substrate, an oxide semiconductor layer disposed above the substrate so as to oppose the gate electrode, a channel protective layer disposed on the oxide semiconductor layer, and a source electrode and a drain electrode each connected to the oxide semiconductor layer. The density of states DOS [eV −1 cm −3 ] of oxygen defects in the oxide semiconductor layer satisfies the following relationship: DOS≦1.710×10 17 ×( Ec−E ) 2 −6.468×10 17 ×( Ec−E )+6.113×10 17 provided that 2.0 eV≦Ec−E≦2.7 eV where Ec [eV] is an energy level of a conduction band edge of the oxide semiconductor layer and E [eV] is a predetermined energy level of the oxide semiconductor layer.

Claims (52)

1. A thin film semiconductor device comprising:

a substrate;

a gate electrode disposed above the substrate;

an oxide semiconductor layer disposed above the substrate so as to oppose the gate electrode;

a first insulating layer disposed on the oxide semiconductor layer; and

a source electrode and a drain electrode each connected to the oxide semiconductor layer,

wherein a density of states DOS [eV −1 cm −2 ] of oxygen defects in the oxide semiconductor layer satisfies the following relationship:

DOS≦1.710×10 17 ×( Ec−E ) 2 −6.468×10 17 ×( Ec−E )+6.113×10 17

provided that 2.0 eV≦Ec−E≦2.7 eV

where Ec [eV] is an energy level of a conduction band edge of the oxide semiconductor layer and E [eV] is a predetermined energy level of the oxide semiconductor layer.

2. The thin film semiconductor device according to claim 1 , wherein the density of states DOS [eV −1 cm −3 ] satisfies the following relationship:

DOS≦1.332×10 10 ×( Ec−E ) 14.65

provided that 2.0 eV≦Ec−E≦2.7 eV.

3. The thin film semiconductor device according to claim 1 , further comprising:

a second insulating layer disposed on the gate electrode,

wherein the oxide semiconductor layer is disposed on the second insulating layer,

a contact hole for exposing part of the oxide semiconductor layer is disposed in the first insulating layer, and

the source electrode and the drain electrode are disposed on the first insulating layer and connected to the oxide semiconductor layer through the contact hole.

4. The thin film semiconductor device according to claim 1 , further comprising:

a second insulating layer disposed on the gate electrode,

wherein the oxide semiconductor layer is disposed on the second insulating layer,

the source electrode and the drain electrode are disposed on the oxide semiconductor layer, and

the first insulating layer is disposed on the source electrode, the drain electrode, and the oxide semiconductor layer.

5. The thin film semiconductor device according to claim 1 , wherein the gate electrode is disposed on the first insulating layer.

6. The thin film semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises a transparent amorphous oxide semiconductor.

7. A method for manufacturing a thin film semiconductor device, the method comprising steps of:

(a) forming a gate electrode above a substrate;

(b) forming an oxide semiconductor layer at a position above the substrate and opposing the gate electrode;

(c) performing a plasma treatment on the oxide semiconductor layer by using gas containing oxygen;

(d) forming a first insulating layer on the oxide semiconductor layer; and

(e) forming a source electrode and a drain electrode each connected to the oxide semiconductor layer,

wherein, in the performing step (c) the plasma treatment is performed in particular conditions that a density of states DOS [eV −1 cm −3 ] of oxygen defects in the oxide semiconductor layer satisfies the following relationship:

DOS≦1.710×10 17 ×( Ec−E ) 2 −6.468×10 17 ×( Ec−E )+6.113×10 17

provided that 2.0 eV≦Ec−E≦2.7 eV,

where Ec [eV] is an energy level of a conduction band edge of the oxide semiconductor layer and E [eV] is a predetermined energy level of the oxide semiconductor layer.

8. The method for manufacturing a thin film semiconductor device according to claim 7 , wherein the gas contains nitrous oxide, and a power density of the plasma treatment is 1 [W/cm 2 ] or less.

9. The method for manufacturing a thin film semiconductor device according to claim 8 , wherein the power density of the plasma treatment is 0.2 [W/cm 2 ] or more.

10. The method for manufacturing a thin film semiconductor device according to claim 7 , wherein the gas contains nitrous oxide, and in the performing step (c) the plasma treatment is performed at a pressure of 2.0 [Torr] or more.

11. The method for manufacturing a thin film semiconductor device according to claim 7 , further comprising a step of:

(f) forming a second insulating layer on the gate electrode,

wherein, in the forming step (b) the oxide semiconductor layer is formed on the second insulating layer,

in the forming step (d) the first insulating layer is formed so that part of the oxide semiconductor layer is exposed, and

in the forming step (e) the source electrode and the drain electrode are formed so as to connect to the oxide semiconductor layer at the exposed part.

12. The method for manufacturing a thin film semiconductor device according to claim 7 , further comprising a step of:

(f) forming a second insulating layer on the gate electrode,

wherein in the forming step (b) the oxide semiconductor layer is formed on the second insulating layer,

in the forming step (e) the source electrode and the drain electrode are formed on the oxide semiconductor layer, and

in the forming step (d) the first insulating layer is formed on the source electrode, the drain electrode, and the oxide semiconductor layer.

13. The method for manufacturing a thin film semiconductor device according to claim 12 , wherein the performing step (c) is performed before the forming step (e).

14. The method for manufacturing a thin film semiconductor device according to claim 7 , wherein in the forming step (a) the gate electrode is formed on the first insulating layer.

15. The method for manufacturing a thin film semiconductor device according to claim 7 , wherein the performing step (c) is performed before the forming step (d).

16. The method for manufacturing a thin film semiconductor device according to claim 7 , wherein the oxide semiconductor layer comprises a transparent amorphous oxide semiconductor.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2015
From: PANASONIC CORPORATION
To: JOLED INC
Reel/Frame 035187/0483 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2014
From: HAYASHI, HIROSHI; IZUMI, TOMOAKI; NONOGUCHI, MAMI; YOSHITANI, TOSHIAKI
To: PANASONIC CORPORATION
Reel/Frame 033823/0511 →