IP Library Patent Application 14481108
Patent Application
App. No. 14/481,108

ADAPTIVE NONLINEAR MODEL LEARNING

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Patent No.
US None
App. No.
14/481,108
Abstract

In accordance with an example implementation of this disclosure, a receiver may comprise a signal reconstruction circuit and a nonlinearity modeling circuit. The nonlinearity modeling circuit may be operable to generate a look-up table (LUT)-based model of nonlinear distortion present in a received signal. An entry of the LUT may comprise a signal power parameter value and a distortion parameter value. The signal reconstruction circuit may be operable to generate one or more candidates for a transmitted signal corresponding to the received signal. The signal reconstruction circuit may be operable to distort the one or more candidates according to the model, the distortion resulting in one or more reconstructed signals. The signal reconstruction circuit may be operable to decide a best one of the candidates based on the one or more reconstructed signals.

Claims (47)

1 . A system comprising:

a signal reconstruction circuit and a nonlinearity modeling circuit, wherein:

said nonlinearity modeling circuit is operable to generate a look-up table (LUT)-based model of nonlinear distortion present in a received signal, wherein an entry of said LUT comprises a signal power parameter value and a distortion parameter value;

said signal reconstruction circuit is operable to generate one or more candidates for a transmitted signal corresponding to said received signal; and

said signal reconstruction circuit is operable to distort said one or more candidates according to said model, said distortion resulting in one or more reconstructed signals.

2 . The system of claim 1 , wherein said signal power parameter value corresponds to the instantaneous power of a symbol.

3 . The system of claim 1 , wherein said signal power parameter value corresponds to a weighted sum of the instantaneous power of each of a plurality of past, current, and/or future symbols.

4 . The system of claim 1 , wherein said distortion parameter value comprises an amplitude-to-amplitude distortion value.

5 . The system of claim 1 , wherein said nonlinearity modeling circuit is operable to:

determine a magnitude error between said received signal and said one or more of the reconstructed signals; and

adjust said amplitude-to-amplitude distortion value based on said magnitude error.

6 . The system of claim 1 , wherein said distortion parameter value comprises an amplitude-to-phase distortion value.

7 . The system of claim 1 , wherein said nonlinearity modeling circuit is operable to:

determine a phase error between said received signal and said reconstructed signal; and

adjust said amplitude-to-phase distortion value based on said phase error.

8 . The system of claim 1 , wherein said distortion parameter value is based on a weighted sum of the instantaneous power of each a plurality of past, current, and/or future symbols.

9 . The system of claim 8 , wherein said nonlinearity modeling circuit is operable generate said weighted sum based on a coefficient vector parameter associated with said LUT.

10 . The system of claim 9 , wherein said nonlinearity modeling circuit is operable to:

determine an error between said received signal and said one or more reconstructed signals; and

adjust said coefficient vector parameter based on said error.

11 . The system of claim 1 , comprising a bits recovery circuit, wherein:

said signal reconstruction circuit is operable to receive an output of said bits recovery circuit for iterative processing of said received signal.

12 . A method comprising:

performing by a signal reconstruction circuit and a nonlinearity modeling circuit of a receiver:

generating a look-up table (LUT)-based model of nonlinear distortion present in a received signal, wherein an entry of said LUT comprises a signal power parameter value and a distortion parameter value;

generating one or more candidates for a transmitted signal corresponding to said received signal; and

distorting said one or more candidates according to said model, said distortion resulting in one or more reconstructed signals.

13 . The method of claim 12 , wherein said signal power parameter value corresponds to the instantaneous power of a symbol.

14 . The method of claim 12 , wherein said signal power parameter value corresponds to a weighted sum of the instantaneous power of each of a plurality of past, current, and/or future symbols.

15 . The method of claim 12 , wherein said distortion parameter value comprises an amplitude-to-amplitude distortion value.

16 . The method of claim 12 , comprising:

performing by said signal reconstruction circuit and a nonlinearity modeling circuit:

determining a magnitude error between said received signal and said reconstructed signal; and

adjusting said amplitude-to-amplitude distortion value based on said magnitude error.

17 . The method of claim 12 , wherein said distortion parameter value comprises an amplitude-to-phase distortion value.

18 . The method of claim 12 , comprising:

performing by said signal reconstruction circuit and a nonlinearity modeling circuit:

determining a phase error between said received signal and said reconstructed signal; and

adjusting said amplitude-to-phase distortion value based on said phase error.

19 . The method of claim 12 , wherein said distortion parameter value is based on a weighted sum of the instantaneous power of each a plurality of past, current, and/or future symbols.

20 . The method of claim 19 , wherein said nonlinearity modeling circuit is operable generate said weighted sum based on a coefficient vector parameter associated with said LUT.

21 . The method of claim 20 , comprising:

performing by said signal reconstruction circuit and a nonlinearity modeling circuit:

determining an error between said received signal and said one or more reconstructed signal; and

adjusting said coefficient vector parameter based on said error.

22 . The method of claim 12 , comprising performing by said signal reconstruction circuit and a nonlinearity modeling circuit:

iteratively processing of said received signal, wherein each subsequent iteration on a particular symbol uses an output of a bits recovery circuitry from a previous iteration.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: MAGNACOM LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041604/0861 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2014
From: ELIAZ, AMIR; REUVEN, ILAN; INTRATER, AMOS; STOPLER, DANIEL; OREN, ROY; BENJO, SHIMON; PITARASHO, GAL
To: MAGNACOM LTD.
Reel/Frame 034006/0171 →