IP Library Granted Patent US 9,674,952
Granted Patent B1
US 9,674,952 · App. 14/482,977 · Granted Jun 6, 2017

Method of making copper pillar with solder cap

Inventors: Weifeng Liu (Dublin, CA); Anwar Mohammed (San Jose, CA); Zhen Feng (San Jose, CA)
Assignee: Flextronics AP, LLC
H05K1/092H05K1/111H05K3/4007H05K2203/043H05K2203/0736
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Quick Facts
Patent No.
US 9,674,952
App. No.
14/482,977
Granted
Jun 6, 2017
Kind
B1
Abstract

An electrical interconnect includes a copper pillar and solder cap. The copper pillar and solder cap are formed onto a contact pad or an under bump metallurgy (UBM). In some applications, the contact pad or UBM is part of an electronic component, such as a semiconductor chip. In other cases, the contact pad is part of laminated substrate, such as a printed circuit board (PCB), or a ceramic substrate. The copper pillar and the solder cap are printed using an ink printer, such as an aerosol ink jet printer. A post heat treatment solidifies the interconnection between the contact pad or UBM, the copper pillar and the solder cap.

Claims (31)

1. A method of fabricating an interconnect, the method comprising:

a. configuring a substrate to have one or more contact pads and an under bump metallurgy layer coupled to each of the one or more contact pads;

b. printing copper ink onto the under bump metallurgy layer of each contact pad to form a copper pillar on the under bump metallurgy layer of each contact pad;

c. printing solder ink onto the copper pillar of each contact pad to form a solder layer on the copper pillar of each contact pad; and

d. performing a post heat treatment to reflow the solder layer into a solder bump and to form a solid connection between the solder bump, the copper pillar and the under bump metallurgy layer of each contact pad.

2. The method of claim 1 wherein the substrate comprises an integrated circuit.

3. The method of claim 1 wherein the substrate comprises a laminated substrate.

4. The method of claim 1 wherein the substrate comprises a ceramic substrate.

5. The method of claim 1 wherein each contact pad comprises aluminum.

6. The method of claim 1 wherein the under bump metallurgy layer comprises titanium/copper, titanium/nickel/gold or titanium/nickel/copper.

7. The method of claim 1 wherein the under bump metallurgy layer is plated to each contact pad.

8. The method of claim 1 wherein the substrate is further configured to have a passivation layer covering a first portion of each contact pad leaving a second portion of each contact pad exposed, wherein the copper pillar on each contact pad protrudes beyond an outer surface of the passivation layer such that at least a portion of copper pillar side surfaces are exposed.

9. The method of claim 1 wherein the copper ink comprises copper nano-particles.

10. The method of claim 1 wherein the solder ink comprises pure tin, tin/gold alloy or tin/gold/copper alloy.

11. The method of claim 1 wherein printing copper ink onto the under bump metallurgy layer comprises spraying the copper ink as an aerosol mist.

12. The method of claim 1 wherein printing solder ink onto the copper pillar comprises spraying the solder ink as an aerosol mist.

13. A method of fabricating an interconnect, the method comprising:

a. configuring a substrate to have one or more contact pads and a passivation layer covering a first portion of each contact pad leaving a second portion of each contact pad exposed;

b. printing copper ink onto the exposed portion of each of the one or more contact pads to form a copper pillar on each contact pad, wherein the copper pillar on each contact pad protrudes beyond an outer surface of the passivation layer such that at least a portion of copper pillar side surfaces are exposed;

c. printing solder ink onto the copper pillar of each contact pad to form a solder layer on the copper pillar of each contact pad; and

d. performing a post heat treatment to reflow the solder layer into a solder bump and to form a solid connection between the solder bump, the copper pillar and the contact pad.

14. The method of claim 13 wherein the substrate comprises an integrated circuit.

15. The method of claim 13 wherein the substrate comprises a laminated substrate.

16. The method of claim 13 wherein the substrate comprises a ceramic substrate.

17. The method of claim 13 wherein each contact pad comprises aluminum.

18. The method of claim 17 wherein the contact pad further comprises a plating over the aluminum, further wherein the plating comprises nickel/gold or pure copper.

19. The method of claim 13 wherein the copper ink comprises copper nano-particles.

20. The method of claim 13 wherein the solder ink comprises pure tin, tin/gold alloy or tin/gold/copper alloy.

21. The method of claim 13 wherein printing copper ink onto the each contact pad comprises spraying the copper ink as an aerosol mist.

22. The method of claim 13 wherein printing solder ink onto the copper pillar comprises spraying the solder ink as an aerosol mist.

23. The method of claim 1 wherein the substrate comprises a base substrate, the one or more contact pads on a surface of the base substrate, and the under bump metallurgy layer applied onto each of the one or more contact pads.

Assignments (9)
SECURITY INTEREST Recorded Jun 2, 2025
From: BRIGHT MACHINES, INC.; BRIGHT MACHINES AUTOMATION CORP.
To: STIFEL BANK
Reel/Frame 071467/0419 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 67201/0797 Recorded Jun 2, 2025
From: JPMORGAN CHASE BANK, N.A.
To: BRIGHT MACHINES, INC.
Reel/Frame 071851/0097 →
TERMINATION AND RELEASE OF INTELLECTUAL PROPERTY SECURITY AGREEMENT AT REEL/FRAME NO. 58085/0124 Recorded May 29, 2025
From: HERCULES CAPITAL, INC.
To: BRIGHT MACHINES, INC.
Reel/Frame 071460/0482 →
TERMINATION AND RELEASE OF INTELLECTUAL PROPERTY SECURITY AGREEMENT AT REEL 057911 FRAME 0323 Recorded Apr 25, 2024
From: SILICON VALLEY BANK, A DIVISION OF FIRST-CITIZENS BANK & TRUST COMPANY (SUCCESSOR TO SILICON VALLEY BANK)
To: BRIGHT MACHINES, INC.
Reel/Frame 067238/0600 →
SECURITY INTEREST Recorded Apr 23, 2024
From: BRIGHT MACHINES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067201/0797 →
SECURITY INTEREST Recorded Nov 11, 2021
From: BRIGHT MACHINES, INC.
To: HERCULES CAPITAL, INC.
Reel/Frame 058085/0124 →
SECURITY INTEREST Recorded Oct 26, 2021
From: BRIGHT MACHINES, INC.; BRIGHT MACHINES AUTOMATION CORP.
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
Reel/Frame 057911/0323 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2021
From: FLEXTRONICS AP, LLC
To: BRIGHT MACHINES, INC.
Reel/Frame 055707/0012 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: LIU, WEIFENG; MOHAMMED, ANWAR; FENG, ZHEN
To: FLEXTRONICS AP, LLC
Reel/Frame 033714/0715 →
Continuity (1)
Provisional Application 61922015 · Dec 30, 2013