IP Library Granted Patent US 9,425,217
Granted Patent B2
US 9,425,217 · App. 14/486,089 · Granted Aug 23, 2016

Semiconductor device

Inventors: Noritaka Ishihara (Koza, JP); Masashi Oota (Atsugi, JP); Masashi Tsubuku (Atsugi, JP); Masami Jintyou (Shimotsuga, JP); Yukinori Shima (Tatebayashi, JP); Junichi Koezuka (Tochigi, JP); Yasuharu Hosaka (Tochigi, JP); Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225H01L29/41733H01L29/45H01L29/7869H01L29/78648H01L29/78693H01L29/78696
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Quick Facts
Patent No.
US 9,425,217
App. No.
14/486,089
Granted
Aug 23, 2016
Kind
B2
Abstract

Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.

Claims (74)

1. A semiconductor device comprising:

an oxide semiconductor layer;

a metal oxide layer comprising an In-M oxide in contact with the oxide semiconductor layer; and

a conductive layer in contact with the metal oxide layer,

wherein the conductive layer comprises one of Cu, Al, Au, and Ag,

wherein the In-M oxide does not comprise Zn,

wherein M is one of Ti, Ga, Y, Zr, La, Ce, Nd, and Hf, and

wherein y/(x+y) is greater than or equal to 0.75 and less than 1 where an atomic ratio of In to M included in the metal oxide layer is In:M=x:y.

2. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer comprises a channel formation region, and

wherein the conductive layer serves as a source electrode or a drain electrode.

3. The semiconductor device according to claim 1 ,

wherein M is Ga, and

wherein an element other than In, Ga and O is contained in the metal oxide layer at a concentration of less than or equal to 0.1%.

4. The semiconductor device according to claim 1 ,

wherein the conductive layer includes a first layer in contact with the metal oxide layer and a second layer in contact with the first layer,

wherein the first layer comprises one of Ti, Ta, Mo, and W, and

wherein the second layer comprises the one of Cu, Al, Au, and Ag.

5. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer between the first oxide semiconductor layer and the metal oxide layer, and

wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer.

6. The semiconductor device according to claim 5 ,

wherein electron affinity of the second oxide semiconductor layer is smaller than electron affinity of the first oxide semiconductor layer and larger than electron affinity of the metal oxide layer.

7. An electronic device comprising the semiconductor device according to claim 1 .

8. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween;

a metal oxide layer comprising an In-M oxide over and in contact with the oxide semiconductor layer; and

a pair of electrode layers in contact with the metal oxide layer,

wherein the pair of electrode layers comprises one of Cu, Al, Au, and Ag,

wherein the In-M oxide does not comprise Zn,

wherein M is one of Ti, Ga, Y, Zr, La, Ce, Nd, and Hf, and

wherein y/(x+y) is greater than or equal to 0.75 and less than 1 where an atomic ratio of In to M included in the metal oxide layer is In:M=x:y.

9. The semiconductor device according to claim 8 ,

wherein M is Ga, and

wherein an element other than In, Ga and O is contained in the metal oxide layer at a concentration of less than or equal to 0.1%.

10. The semiconductor device according to claim 8 ,

wherein the pair of electrode layers includes a first layer in contact with the metal oxide layer and a second layer in contact with the first layer,

wherein the first layer comprises one of Ti, Ta, Mo, and W, and

wherein the second layer comprises the one of Cu, Al, Au, and Ag.

11. The semiconductor device according to claim 8 ,

wherein the oxide semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer between the first oxide semiconductor layer and the metal oxide layer, and

wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer.

12. The semiconductor device according to claim 11 ,

wherein electron affinity of the second oxide semiconductor layer is smaller than electron affinity of the first oxide semiconductor layer and larger than electron affinity of the metal oxide layer.

13. An electronic device comprising the semiconductor device according to claim 8 .

14. A semiconductor device comprising:

a first gate electrode layer;

a first gate insulating layer over the first gate electrode layer;

an oxide semiconductor layer over the first gate electrode layer with the first gate insulating layer therebetween;

a metal oxide layer comprising an In-M oxide over and in contact with the oxide semiconductor layer;

a pair of electrode layers in contact with the metal oxide layer;

a second gate insulating layer over and in contact with the pair of electrode layers; and

a second gate electrode layer over the oxide semiconductor layer with the second gate insulating layer therebetween,

wherein the pair of electrode layers comprises one of Cu, Al, Au, and Ag,

wherein the In-M oxide does not comprise Zn,

wherein M is one of Ti, Ga, Y, Zr, La, Ce, Nd, and Hf, and

wherein y/(x+y) is greater than or equal to 0.75 and less than 1 where an atomic ratio of In to M included in the metal oxide layer is In:M=x:y, and

wherein the first gate electrode layer and the second gate electrode layer are electrically connected to each other through an opening in the first gate insulating layer and the second gate insulating layer.

15. The semiconductor device according to claim 14 ,

wherein M is Ga, and

wherein an element other than In, Ga and O is contained in the metal oxide layer at a concentration of less than or equal to 0.1%.

16. The semiconductor device according to claim 14 ,

wherein the pair of electrode layers includes a first layer in contact with the metal oxide layer and a second layer in contact with the first layer,

wherein the first layer comprises one of Ti, Ta, Mo, and W, and

wherein the second layer comprises the one of Cu, Al, Au, and Ag.

17. The semiconductor device according to claim 14 ,

wherein the oxide semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer between the first oxide semiconductor layer and the metal oxide layer, and

wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer.

18. The semiconductor device according to claim 17 ,

wherein electron affinity of the second oxide semiconductor layer is smaller than electron affinity of the first oxide semiconductor layer and larger than electron affinity of the metal oxide layer.

19. The semiconductor device according to claim 14 , wherein side surfaces of the oxide semiconductor layer face the second gate electrode layer with the second gate insulating layer therebetween.

20. An electronic device comprising the semiconductor device according to claim 14 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2014
From: ISHIHARA, NORITAKA; OOTA, MASASHI; TSUBUKU, MASASHI; JINTYOU, MASAMI; SHIMA, YUKINORI; KOEZUKA, JUNICHI; YAMAZAKI, SHUNPEI; HOSAKA, YASUHARU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 033978/0509 →
Priority Claims (1)
JP 2013-196333 · Sep 23, 2013 · national
Continuity (1)
Related Publication 20150084043A1 · Mar 26, 2015