Semiconductor device including a local wiring connecting diffusion regions

1. A semiconductor device comprising:

a plurality of first conductivity type regions extending in a first direction, and a plurality of second conductivity type regions extending in the first direction, the plurality of first conductivity type regions and the plurality of second conductivity type regions being arranged such that the plurality of first conductivity type regions and the plurality of second conductivity type regions are alternately arranged in a second direction perpendicular to the first direction;

a plurality of first impurity diffused regions formed in the plurality of first conductivity type regions;

a first local wiring in direct contact with the plurality of first impurity diffused regions, and extending in the second direction above the plurality of first conductive type regions and the plurality of second conductive type regions;

a first potential supply wiring formed above the first local wiring, and extending in the first direction; and

a first contact hole for connecting the first local wiring to the first potential supply wiring.

2. The semiconductor device according to claim 1 , further comprising:

a plurality of second impurity diffused regions formed in the plurality of second conductivity type regions;

a second local wiring in direct contact with the plurality of second impurity diffused regions, and extending in the second direction above the plurality of first conductive type regions and the plurality of second conductive type regions;

a second potential supply wiring formed above the second local wiring, and extending in the first direction; and

a second contact hole for connecting the second local wiring to the second potential supply wiring.

3. The semiconductor device according to claim 1 , wherein:

a plurality of transistors are formed in the plurality of first conductivity type regions, and

the first local wiring supplies a potential to a substrate of the plurality of transistors through the plurality of first impurity diffused regions.

4. The semiconductor device according to claim 1 , further comprising:

a dummy gate extending in the second direction and formed on the plurality of first conductivity type regions, wherein

the first local wiring is in contact with the dummy gate.

5. The semiconductor device according to claim 1 , further comprising:

a dummy gate extending in the second direction and formed on the plurality of first conductivity type regions,

wherein the dummy gate overlaps with the plurality of first impurity diffused regions in at least one portion in planar view.

6. The semiconductor device according to claim 1 , wherein

the first potential supply wiring is arranged above the plurality of first conductivity type regions.

7. The semiconductor device according to claim 1 , wherein the first local wiring is formed by a single conductive layer.

8. The semiconductor device according to claim 2 , wherein

the first local wiring is separated from the plurality of second impurity diffused regions.

9. A semiconductor device comprising:

a plurality of first conductivity type regions extending in a first direction, and a plurality of second conductivity type regions extending in the first direction, the plurality of first conductivity type regions and the plurality of second conductivity type regions being arranged such that the plurality of first conductivity type regions and the plurality of second conductivity type regions are alternately arranged in a second direction perpendicular to the first direction;

a plurality of first impurity diffused regions formed in the plurality of first conductivity type regions;

a first local wiring connected to the plurality of first impurity diffused regions, and extending in the second direction;

a first potential supply wiring formed above the first local wiring, and extending in the first direction; and

a first contact hole for connecting the first local wiring to the first potential supply wiring, wherein:

the first local wiring has at least two wiring widths in the first direction, and

one of the two wiring widths is larger in a region overlapping with the plurality of first impurity diffused regions than other one of the two wiring widths.

10. The semiconductor device according to claim 9 , further comprising:

a plurality of second impurity diffused regions formed in the plurality of second conductivity type regions;

a second local wiring in direct contact with the plurality of second impurity diffused regions, and extending in the second direction;

a second potential supply wiring formed above the second local wiring, and extending in the first direction; and

a second contact hole for connecting the second local wiring to the second potential supply wiring.

11. The semiconductor device according to claim 9 , wherein:

a plurality of transistors are formed in the plurality of first conductivity type regions, and

the first local wiring supplies a potential to a substrate of the plurality of transistors through the plurality of first impurity diffused regions.

12. The semiconductor device according to claim 9 , further comprising:

a dummy gate extending in the second direction and formed on the plurality of first conductivity type regions, wherein

the first local wiring is in contact with the dummy gate.

13. The semiconductor device according to claim 9 , further comprising:

a dummy gate extending in the second direction and formed on the plurality of first conductivity type regions, wherein

the dummy gate overlaps with the plurality of first impurity diffused regions in at least one portion in planar view.

14. The semiconductor device according to claim 9 , wherein

the first potential supply wiring is arranged above the plurality of first conductivity type regions.

15. The semiconductor device according to claim 10 , wherein

the first local wiring is separated from the plurality of second impurity diffused regions.

16. A semiconductor device comprising:

a plurality of first conductivity type regions extending in a first direction, and a plurality of second conductivity type regions extending in the first direction, the plurality of first conductivity type regions and the plurality of second conductivity type regions being arranged such that the plurality of first conductivity type regions and the plurality of second conductivity type regions are alternately arranged in a second direction perpendicular to the first direction;

a plurality of first impurity diffused regions formed in the plurality of first conductivity type regions;

a first local wiring connected to the plurality of first impurity diffused regions, and extending in the second direction;

a first potential supply wiring formed above the first local wiring, and extending in the first direction;

a first contact hole for connecting the first local wiring to the first potential supply wiring; and

a dummy gate extending in the second direction and formed on the plurality of first conductivity type regions,

wherein the plurality of first impurity diffused regions is in contact with the dummy gate.

17. The semiconductor device according to claim 16 , further comprising:

a plurality of second impurity diffused regions formed in the plurality of second conductivity type regions;

a second local wiring in direct contact with the plurality of second impurity diffused regions, and extending in the second direction;

a second potential supply wiring formed above the second local wiring, and extending in the first direction;

and a second contact hole for connecting the second local wiring to the second potential supply wiring.

18. The semiconductor device according to claim 16 , wherein:

a plurality of transistors are formed in the plurality of first conductivity type regions, and

the first local wiring supplies a potential to a substrate of the plurality of transistors through the plurality of first impurity diffused regions.

19. The semiconductor device according to claim 16 , wherein

the first potential supply wiring is arranged above the plurality of first conductivity type regions.

20. The semiconductor device according to claim 17 , wherein

the first local wiring is separated from the plurality of second impurity diffused regions.