Adjustable and buffered reference for ADC resolution and accuracy enhancements

1. An apparatus, comprising:

an analog to digital converter (ADC) core;

a reference voltage generator coupled to an input of the ADC core;

a bandgap reference coupled to the reference voltage generator; and

a window comparator configured to control a selected reference voltage range generated by the reference voltage generator and received by the ADC core.

2. The apparatus of claim 1 , wherein a resolution of the ADC core is mapped to an effective number of bits of a targeted signal input range.

3. The apparatus of claim 1 , wherein the ADC core is a ten bit ADC core.

4. The apparatus of claim 1 , wherein the reference voltage generator comprises a voltage reference multiplexer.

5. The apparatus of claim 4 , wherein the voltage reference multiplexer comprises a resistive ladder.

6. An apparatus, comprising:

means for performing an analog to digital conversion;

a reference voltage generator coupled to an input of the means for performing the analog to digital conversion;

a bandgap reference coupled to the reference voltage generator; and

a window comparator configured to control a selected reference voltage range generated by the reference voltage generator and received by the means for performing the analog to digital conversion.

7. The apparatus of claim 6 , wherein a resolution of the means for performing the analog to digital conversion is mapped to an effective number of bits of a targeted signal input range.

8. The apparatus of claim 6 , wherein the means for performing the analog to digital conversion is a ten bit ADC core.

9. The apparatus of claim 6 , wherein the reference voltage generator comprises a voltage reference multiplexer.

10. The apparatus of claim 6 , wherein the voltage reference multiplexer comprises a resistive ladder.