IP Library Patent Application 14495868
Patent Application
App. No. 14/495,868

ADAPTIVE FEEDBACK FOR POWER DISTRIBUTION NETWORK IMPEDANCE BARRIER SUPPRESSION

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Patent No.
US None
App. No.
14/495,868
Abstract

An adaptive feedback circuit may include: a filter having a first terminal coupled to a first power supply line and a second terminal coupled to a second power supply line, the filter configured to output a high-frequency signal that is transmitted between the first and second power supply lines; an amplifier configured to receive the high-frequency signal output from the filter and generate an amplified high-frequency signal at an output of the amplifier; and a capacitor having a first terminal coupled to the first power supply line and a second terminal coupled to the output of the amplifier. The capacitor is configured to receive the amplified high-frequency signal, and the amplified high-frequency signal generated by the amplifier controls a voltage applied between the first terminal and the second terminal of the capacitor.

Claims (45)

1 . An adaptive feedback circuit, comprising:

a filter having a first terminal coupled to a first power supply line and a second terminal coupled to a second power supply line, the filter configured to output a high-frequency signal that is transmitted between the first and second power supply lines;

an amplifier configured to receive the high-frequency signal output from the filter and generate an amplified high-frequency signal at an output of the amplifier; and

a capacitor having a first terminal coupled to the first power supply line and a second terminal coupled to the output of the amplifier,

wherein the capacitor is configured to receive the amplified high-frequency signal, and the amplified high-frequency signal generated by the amplifier controls a voltage applied between the first terminal and the second terminal of the capacitor.

2 . The adaptive feedback circuit of claim 1 , wherein the capacitor is coupled proximately to a connection of the first power supply line or the second power supply line with an external power supply.

3 . The adaptive feedback circuit of claim 1 , wherein the amplified high-frequency signal generated by the amplifier controls the voltage applied between the first terminal and the second terminal of the capacitor proportional to the high-frequency signal output by the filter.

4 . The adaptive feedback circuit of claim 1 , wherein the first power supply line is a positive power supply line and the second power supply line is a negative power supply line.

5 . The adaptive feedback circuit of claim 1 , wherein the first power supply line is a negative power supply line and the second power supply line is a positive power supply line.

6 . The adaptive feedback circuit of claim 1 , wherein the filter is a resistive-capacitive high-pass filter.

7 . An integrated circuit (IC), comprising:

an adaptive feedback circuit, the adaptive feedback circuit comprising:

a filter having a first terminal coupled to a first power supply line and a second terminal coupled to a second power supply line, the filter configured to output a high-frequency signal transmitted between the first and second power supply lines;

an amplifier configured to receive the high-frequency signal output from the filter and generate an amplified high-frequency signal at an output of the amplifier; and

a capacitor having a first terminal coupled to the first power supply line and a second terminal coupled to the output of the amplifier,

wherein the capacitor is configured to receive the amplified high-frequency signal, and the amplified high-frequency signal generated by the amplifier controls a voltage applied between the first terminal and the second terminal of the capacitor, and

wherein the capacitor is coupled proximately to a connection of the first power supply line or the second power supply line with a power supply external to the IC.

8 . The IC of claim 7 , wherein the amplified high-frequency signal generated by the amplifier controls the voltage applied between the first terminal and the second terminal of the capacitor proportional to the high-frequency signal output by the filter.

9 . The IC of claim 7 , wherein the first power supply line is a positive power supply line and the second power supply line is a negative power supply line.

10 . The IC of claim 7 , wherein the first power supply line is a negative power supply line and the second power supply line is a positive power supply line.

11 . The IC of claim 7 of claim 7 , the filter is a resistive-capacitive high-pass filter.

12 . A System-on-Chip (SoC), comprising:

a plurality of integrated circuits (ICs) configured to perform operational functions of the SoC;

a power distribution network configured to supply power to at least one of the plurality of ICs; and

a package configured to mechanically enclose the plurality of ICs and the power distribution network, the package comprising one or more electrical leads configured to connect the SoC to a printed circuit board,

wherein the at least one of the plurality of integrated circuits comprises:

an adaptive feedback circuit, comprising:

a filter having a first terminal coupled to a first power supply line and a second terminal coupled to a second power supply line, the filter configured to output a high-frequency signal transmitted between the first and second power supply lines;

an amplifier configured to receive the high-frequency signal output from the filter and generate an amplified high-frequency signal at an output of the amplifier; and

a capacitor having a first terminal coupled to the first power supply line and a second terminal coupled to the output of the amplifier,

wherein the capacitor is configured to receive the amplified high-frequency signal, and the amplified high-frequency signal generated by the amplifier controls a voltage applied between the first terminal and the second terminal of the capacitor.

13 . The SoC of claim 12 , wherein the amplified high-frequency signal generated by the amplifier controls the voltage applied between the first terminal and the second terminal of the capacitor proportional to the high-frequency signal output by the filter.

14 . The SoC of claim 12 , wherein the first power supply line is a positive power supply line and the second power supply line is a negative power supply line.

15 . The SoC of claim 12 , wherein the first power supply line is a negative power supply line and the second power supply line is a positive power supply line.

16 . The SoC of claim 12 , the filter is a resistive-capacitive high-pass filter.

17 . The SoC of claim 12 , wherein the adaptive feedback circuit is disposed internal to the at least one of the plurality of ICs, and

wherein the capacitor is coupled proximately to a connection of the power distribution network with the at least one of the plurality of ICs.

18 . The SoC of claim 12 , wherein the adaptive feedback circuit is disposed external to the at least one of the plurality of ICs, and

wherein the capacitor is coupled proximately to a connection of the power distribution network with the at least one of the plurality of ICs.

19 . A method of reducing noise in a circuit, the method comprising:

filtering a high-frequency signal transmitted between a first power supply line and a second power supply line and outputting the high-frequency signal;

amplifying the high-frequency signal to generate an amplified high-frequency signal; and

supplying current to one of the first and second power supply lines based on the amplified high-frequency signal.

20 . The method of claim 19 , wherein the current is supplied to one of the first and second power supply lines through a capacitor having a first terminal coupled to one of the first and second power supply lines.

21 . The method of claim 20 , further comprising controlling a voltage applied between the first terminal and a second terminal of the capacitor proportional the amplified high-frequency signal.

Assignments (6)
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2015
From: ADAMS, DONALD E.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 036136/0030 →