Signal synthesis circuit to synthesize luma signals and chroma signals
View Patent ↗A signal synthesis circuit synthesizes luma signals and chroma signals output by a video signal source, to output composite video broadcast signals (CVBS). The signal synthesis circuit includes a first gain adjusting unit, a delay unit, and a second gain adjusting unit. The first gain adjusting unit receives and adjusts the gain of the luma signals from the video signal source, and the delay unit delays phases of the luma signals output by the first gain adjusting unit. The second gain adjusting unit receives and adjusts the gain of the chroma signals from the video signal source so that the luma signals output by the delay unit and the chroma signals output by the second gain adjusting unit can be synthesized into the CVBS.
1. A signal synthesis circuit comprising:
a first gain adjusting unit configured to receive luma signals from a video signal source and adjust gains of the luma signals;
a delay unit coupled to the first gain adjusting unit, the delay unit configured to delay phases of the luma signals output by the first gain adjusting unit, wherein the delay unit comprises a plurality of resonance oscillation units coupled in series; and
a second gain adjusting unit coupled to the delay unit, the second gain adjusting unit configured to receive chroma signals from the video signal source and adjust gains of the chroma signals so that the phase delayed luma signals output by the delay unit and the chroma signals output by the second gain adjusting unit are synthesized into composite video broadcast signals (CVBS).
2. The signal synthesis circuit of claim 1 , further comprising a direct current (DC) isolation unit, wherein the DC isolation unit is configured to filter out DC interferences from the CVBS.
3. The signal synthesis circuit of claim 2 , wherein the DC isolation unit comprises a capacitor, a first end of the capacitor is coupled to a node between the delay unit and the second gain adjusting unit, and a second end of the capacitor is coupled to a tuner.
4. The signal synthesis circuit of claim 1 , wherein the first gain adjusting unit comprises a resistor, a first end of the resistor is coupled to the video signal source and the delay unit, and a second end of the resistor is grounded.
5. The signal synthesis circuit of claim 1 , wherein the delay unit comprises:
a first capacitor with a first end coupled to the first gain adjusting unit and a second end grounded;
a second capacitor coupled to the first capacitor in parallel;
a first inductor with a first end coupled to a node between the first capacitor and the first gain adjusting unit;
a third capacitor with a first end coupled to a second end of the first inductor and a second end grounded;
a fourth capacitor coupled to the third capacitor in parallel;
a second inductor with a first end coupled to a node between the first inductor and the third capacitor and a second end coupled to the second gain adjusting unit;
a fifth capacitor with a first end coupled to a node between the second inductor and the second gain adjusting unit and a second end grounded; and
a sixth capacitor coupled to the fifth capacitor in parallel.
6. The signal synthesis circuit of claim 1 , wherein the second gain adjusting unit comprises:
a first resistor with a first end coupled to the video signal source and a second end coupled to the delay unit; and
a second resistor with a first end coupled to a node between the first resistor and the delay unit and a second end grounded.