IP Library Granted Patent US 9,153,283
Granted Patent B1
US 9,153,283 · App. 14/501,471 · Granted Oct 6, 2015

Data storage device compensating for hysteretic response of microactuator

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,153,283
App. No.
14/501,471
Granted
Oct 6, 2015
Kind
B1
Abstract

A data storage device is disclosed comprising a microactuator configured to actuate a head over a disk. A control signal applied to the microactuator is generated based on an input sequence u(k). A Preisach bit map b j is updated based on the input sequence u(k), wherein the Preisach bit map b j corresponds to a Preisach plane modeling a hysteretic response of the microactuator. A current compensation value y i is generated based on an update value generated based on: ∑ j ⁢ h ⁡ ( j ) ⁢ b ^ j where h j represents a slice of the Preisach plane and {circumflex over (b)} j is an update bit map based on at least part of the Preisach bit map b j . The current input u i and the current compensation value y i are combined to generate the control signal applied to the microactuator.

Claims (83)

1. A data storage device comprising:

a disk;

a head;

a microactuator configured to actuate the head over the disk; and

control circuitry configured to:

generate a control signal applied to the microactuator based on an input sequence u(k);

update a Preisach bit map b j based on the input sequence u(k), wherein the Preisach bit map b j corresponds to a Preisach plane modeling a hysteretic response of the microactuator;

generate a current compensation value y i based on an update value generated based on:

j

h

(

j

)

b

^

j

where h j represents a slice of the Preisach plane and {circumflex over (b)} j is an update bit map based on at least part of the Preisach bit map b j ; and

combine a current input u i and the current compensation value y i to generate the control signal applied to the microactuator.

2. The data storage device as recited in claim 1 , wherein the compensation value compensates for the hysteretic response of the microactuator.

3. The data storage device as recited in claim 1 , wherein when a previous input u i-1 is less than the current input u i , the control circuitry is further configured to generate the current compensation value y i by adding the update value to a previous compensation value y i-1 .

4. The data storage device as recited in claim 1 , wherein when a previous input u i-1 is less than the current input u i , the control circuitry is further configured to generate the update bit map {circumflex over (b)} j based on u i -u i-1 bits of the Preisach bit map b j .

5. The data storage device as recited in claim 4 , wherein the u i -u i-1 bits of the Preisach bit map b j comprise high order bits of the Preisach bit map b j having a target value.

6. The data storage device as recited in claim 5 , wherein the u i -u i-1 bits of the Preisach bit map b j comprise the high order bits of the Preisach bit map b j having a target value of 1.

7. The data storage device as recited in claim 6 , wherein after generating the update value the control circuitry is further configured to clear m high order bits of the Preisach bit map b j where m represents the u i -u i-1 high order bits of the Preisach bit map b j having a target value of 1 plus the intervening 0 bits.

8. The data storage device as recited in claim 1 , wherein when a previous input u i-1 is greater than the current input u i , the control circuitry is further configured to generate the current compensation value y i by subtracting the update value from a previous compensation value y i-1 .

9. The data storage device as recited in claim 1 , wherein when a previous input u i-1 is greater than the current input u i , the control circuitry is further configured to generate the update bit map {circumflex over (b)} j by inverting at least part of the Preisach bit map b j .

10. A data storage device comprising:

a head;

a disk;

a microactuator configured to actuate the head over the disk; and

control circuitry configured to:

inject a sinusoid into a control signal applied to the microactuator and measure a sinusoidal response of the microactuator; and

generate a Preisach plane based on at least two cycles of the measured sinusoidal response, wherein the Preisach plane models a hysteretic response of the microactuator.

11. The data storage device as recited in claim 10 , wherein the control circuitry is further configured to:

generate a control signal applied to the microactuator based on an input sequence u(k);

generate compensation values y(k) based on the input sequence u(k) and the Preisach plane; and

combine a current input u i and a current compensation value y i to generate the control signal applied to the microactuator.

12. The data storage device as recited in claim 11 , wherein the compensation values y(k) compensate for the hysteretic response of the microactuator.

13. The data storage device as recited in claim 10 , wherein the control circuitry is further configured to:

adjust an offset of the sinusoid injected into the control signal applied to the microactuator; and

after adjusting the offset, generate part of the Preisach plane based on at least two cycles of the measured sinusoidal response.

14. A method of operating a data storage device, the method comprising:

generating a control signal applied to a microactuator based on an input sequence u(k), wherein the microactuator is configured to actuate a head over a disk;

updating a Preisach bit map b j based on the input sequence u(k), wherein the Preisach bit map b j corresponds to a Preisach plane modeling a hysteretic response of the microactuator;

generating a current compensation value y i based on an update value generated based on:

j

h

(

j

)

b

^

j

where h j represents a slice of the Preisach plane and {circumflex over (b)} j is an update bit map based on at least part of the Preisach bit map b j ; and

combining a current input u i and the current compensation value y i to generate the control signal applied to the microactuator.

15. The method as recited in claim 14 , wherein the compensation value compensates for the hysteretic response of the microactuator.

16. The method as recited in claim 14 , wherein when a previous input u i-1 is less than the current input u i , the method further comprises generating the current compensation value y i by adding the update value to a previous compensation value y i-1 .

17. The method as recited in claim 14 , wherein when a previous input u i-1 is less than the current input u i , the method further comprises generating the update bit map {circumflex over (b)} j based on u i -u i-1 bits of the Preisach bit map b j .

18. The method as recited in claim 17 , wherein the u i -u i-1 bits of the Preisach bit map b j comprise high order bits of the Preisach bit map b j having a target value.

19. The method as recited in claim 18 , wherein the u i -u i-1 bits of the Preisach bit map b 1 comprise the high order bits of the Preisach bit map b 1 having a target value of 1.

20. The method as recited in claim 19 , wherein after generating the update value the method further comprises clearing m high order bits of the Preisach bit map b j where m represents the u i -u i-1 high order bits of the Preisach bit map b j having a target value of 1 plus the intervening 0 bits.

21. The method as recited in claim 14 , wherein when a previous input u i-1 is greater than the current input u i , the method further comprises generating the current compensation value y i by subtracting the update value from a previous compensation value y i-1 .

22. The method as recited in claim 14 , wherein when a previous input u i-1 is greater than the current input u i , the method further comprises generating the update bit map {circumflex over (b)} j by inverting at least part of the Preisach bit map b j .

23. A method of operating a data storage device, the method comprising:

actuating a head over a disk using a microactuator;

injecting a sinusoid into a control signal applied to the microactuator and measure a sinusoidal response of the microactuator; and

generating a Preisach plane based on at least two cycles the measured sinusoidal response, wherein the Preisach plane models a hysteretic response of the microactuator.

24. The method as recited in claim 23 , further comprising:

generating a control signal applied to the microactuator based on an input sequence u(k);

generating compensation values y(k) based on the input sequence u(k) and the Preisach plane; and

combining a current input u i and a current compensation value y i to generate the control signal applied to the microactuator.

25. The method as recited in claim 24 , wherein the compensation values y(k) compensate for the hysteretic response of the microactuator.

26. The method as recited in claim 23 , further comprising:

adjusting an offset of the sinusoid injected into the control signal applied to the microactuator; and

after adjusting the offset, generating part of the Preisach plane based on at least two cycles the measured sinusoidal response.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2015
From: XI, WEI; ZHANG, WENLIN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 036167/0395 →