A layer system having a layer region whereby the layer region has a single-crystal silicon substrate with a front side and a back side, and whereby a textured surface is formed on the front side and the textured surface has a topography with different heights and a thin film layer of a metal oxide and/or an oxide ceramic is formed on the textured surface, whereby the thin film layer covers the textured surface.
1. A layer system having a layer region, the layer region comprising:
a single-crystal silicon substrate with a front side and a back side;
a textured surface formed on a first portion of the front side, the textured surface having a topography;
an intermediate layer disposed only on peaks of the topography; and
a thin film layer of a metal oxide and/or an oxide ceramic formed on both the textured surface and a second portion of the front side not covered by the textured surface, the thin film layer covering the textured surface.
2. The layer system according to claim 1 , wherein the textured surface has a pyramid-shaped topography.
3. The layer system according to claim 1 , wherein the thin film layer comprises a catalyst.
4. The layer system according to claim 3 , wherein the catalyst includes platinum and/or palladium and/or rhodium.
5. The layer system according to claim 1 , wherein the thin film layer has a thickness smaller than 500 μm.
6. The layer system according to claim 1 , wherein the intermediate layer is a metallically conductive intermediate layer.
7. The layer system according to claim 6 , wherein the metallically conductive intermediate layer comprises a silicide layer.
8. The layer system according to claim 7 , wherein the silicide layer comprises platinum and/or titanium and/or palladium.
9. The layer system according to claim 6 , wherein the metallically conductive intermediate layer is electrically connectable.
10. The layer system according to claim 1 , wherein the thin film layer is electrically connectable.
11. The layer system according to claim 1 , wherein the textured silicon substrate has a p- or an n-type doping in the layer region.
12. The layer system according to claim 1 , wherein the layer region is integrated in an SGFET or CCFET gas sensor as a gas-sensitive control electrode.
13. The layer system according to claim 1 , wherein side surfaces of a pyramid-shaped texture are 111 surfaces and a texture on a top side has 100 surfaces.
14. The layer system according to claim 1 , wherein the thin film layer contains gallium oxide and/or tin oxide and/or barium titanate and/or barium carbonate.
15. The layer system according to claim 1 , wherein the textured surface contains pyramid top surfaces or pyramid peaks, wherein a distance of 1 μm to 10 μm is formed between directly adjacent pyramid peaks or pyramid top surfaces, and wherein the pyramid top surfaces or pyramid peaks are between 1 μm and 10 μm in height.
16. The layer system according to claim 6 , wherein the metallically conductive intermediate layer has a texturing with a texture spacing of 0.1 μm to 1 μm and a texture depth of 0.1 μm to 1 μm, and wherein the texture spacing and the texture depth are each smaller than those at the surface of the silicon substrate.
17. The layer system according to claim 1 , wherein the thin film layer is formed of a polycrystalline and grain sizes of the thin film layer are smaller than 2 μm.
18. The layer system according to claim 1 , wherein the thin film layer completely covers the textured surface.
19. A layer system having a layer region, the layer region comprising:
a single-crystal silicon substrate with a front side and a back side;
a textured surface formed on a first portion of the front side, the textured surface having a topography with different heights; and
a thin film layer of a metal oxide and/or an oxide ceramic formed on the textured surface and a second portion of the front side not covered by the textured surface, the thin film layer covering the entire textured surface such that an outermost thin film layer surface is substantially flat.
20. A layer system having a layer region, the layer region comprising:
a single-crystal silicon substrate with a front side and a back side;
a textured surface formed on a first portion of the front side, the textured surface having a topography with different heights;
an intermediate metallic layer formed on the textured surface and a second portion of the front side not covered by the textured surface; and
a thin film layer of a metal oxide and/or an oxide ceramic formed on the intermediate metallic layer of the textured surface and the portion of the front side not covered by the textured surface, the thin film layer covering the textured surface.
21. The layer system according to claim 1 , wherein the topography comprises peaks spaced apart at a distance, and wherein the bases of the peaks overlap.
22. The layer system according to claim 1 , wherein the textured surface has a topography with different heights.