Monitoring circuit of semiconductor device to monitor a read-period signal during activation of a boot-up enable signal
View Patent ↗The monitoring circuit of a semiconductor device includes: a boot-up controller configured to generate a boot-up enable signal in response to a power-up signal and a boot-up command signal; a read-period generator configured to output a read-period signal in response to a boot-up read signal; and a monitoring unit configured to output the read-period signal to an external output terminal during activation of the boot-up enable signal to allow the read-period signal to be monitored.
1. A monitoring circuit of a semiconductor device comprising:
a boot-up controller configured to generate a boot-up enable signal in response to a power-up signal and a boot-up command signal;
a read-period generator configured to output a read-period signal in response to a boot-up read signal; and
a monitoring unit configured to output the read-period signal to an external output terminal during activation of the boot-up enable signal to allow the read-period signal to be monitored.
2. The monitoring circuit according to claim 1 , wherein the monitoring unit includes:
a combination unit configured to logically combine the boot-up enable signal and the read-period signal; and
an output driver configured to output a high-level signal or a low-level signal to the output terminal in response to an output signal of the combination unit.
3. The monitoring circuit according to claim 2 , wherein the combination unit activates a pull-up drive signal when the boot-up enable signal and the read-period signal are at a high level, and a pull-down drive signal when the boot-up enable signal is at a high level and the read-period signal is at a low level.
4. The monitoring circuit according to claim 2 , wherein the combination unit includes:
a NAND gate configured to perform a NAND operation between the boot-up enable signal and the read-period signal; and
a NOR gate configured to perform a NOR operation between the boot-up enable signal and an inversion signal of the read-period signal.
5. The monitoring circuit according to claim 2 , wherein the output driver outputs a high-level signal to the output terminal when a pull-up drive signal received from the combination unit is activated, and a low-level signal to the output terminal when a pull-down drive signal received from the combination unit is activated.
6. The monitoring circuit according to claim 2 , wherein the output driver includes:
a pull-up drive element electrically coupled between a power-supply voltage terminal and the output terminal to receive a pull-up drive signal from the combination unit through a gate terminal; and
a pull-down drive element electrically coupled between the output terminal and a ground terminal to receive a pull-down drive signal from the combination unit through a gate terminal.
7. The monitoring circuit according to claim 1 , wherein the monitoring unit outputs a high-level signal to the output terminal when the boot-up enable signal and the read-period signal are at a high level, and a low-level signal to the output terminal when the boot-up enable signal is at a high level and the read-period signal is at a low level.
8. The monitoring circuit according to claim 1 , wherein the boot-up enable signal is activated to a high level when at least one of the power-up signal and the boot-up command signal is activated.
9. The monitoring circuit according to claim 1 , wherein the boot-up controller is reset in response to a count-end signal.
10. A monitoring circuit of a semiconductor device comprising:
a boot-up controller configured to generate a boot-up enable signal in response to a power-up signal and a boot-up command signal;
a read-period generator configured to output a read-period signal in response to a boot-up read signal and a latch enable signal;
a counter unit configured to output a counting signal by counting the number of read-period signals during an activation of the boot-up enable signal, and output a count-end signal upon completion of the counting operation;
a fuse array configured to output repair information in response to the counting signal; and
a monitoring unit configured to output the read-period signal to an external output terminal during activation of the boot-up enable signal to allow the read-period signal to be monitored.
11. The monitoring circuit according to claim 10 , wherein the monitoring unit includes:
a combination unit configured to logically combine the boot-up enable signal and the read-period signal; and
an output driver configured to output a high-level signal or a low-level signal to the output terminal in response to an output signal of the combination unit.
12. The monitoring circuit according to claim 11 , wherein the combination unit activates a pull-up drive signal when the boot-up enable signal and the read-period signal are at a high level, and a pull-down drive signal when the boot-up enable signal is at a high level and the read-period signal is at a low level.
13. The monitoring circuit according to claim 11 , wherein the combination unit includes:
a NAND gate configured to perform a NAND operation between the boot-up enable signal and the read-period signal; and
a NOR gate configured to perform a NOR operation between the boot-up enable signal and an inversion signal of the read-period signal.
14. The monitoring circuit according to claim 11 , wherein the output driver outputs a high-level signal to the output terminal when a pull-up drive signal received from the combination unit is activated, and a low-level signal to the output terminal when a pull-down drive signal received from the combination unit is activated.
15. The monitoring circuit according to claim 11 , wherein the output driver includes:
a pull-up drive element electrically coupled between a power-supply voltage terminal and the output terminal so as to receive a pull-up drive signal from the combination unit through a gate terminal thereof; and
a pull-down drive element electrically coupled between the output terminal and a ground terminal so as to receive a pull-down drive signal from the combination unit through a gate terminal thereof.
16. The monitoring circuit according to claim 10 , wherein the monitoring unit outputs a high-level signal to the output terminal when the boot-up enable signal and the read-period signal are at a high level, and a low-level signal to the output terminal when the boot-up enable signal is at a high level and the read-period signal is at a low level.
17. The monitoring circuit according to claim 10 , wherein the boot-up enable signal is activated to a high level when at least one of the power-up signal and the boot-up command signal is activated.
18. The monitoring circuit according to claim 10 , wherein the boot-up controller is reset in response to the count-end signal.
19. The monitoring circuit according to claim 10 , further comprising:
an oscillator configured to output the boot-up read signal and the latch enable signal in response to the boot-up enable signal;
a delay unit configured to delay the latch enable signal;
a row decoder configured to select a word line of the fuse array in response to the counting signal;
a column decoder configured to select a bit line of the fuse array in response to the counting signal;
a sensing unit configured to sense data read from the fuse array through the column decoder in response to an output signal of the delay unit; and
a latch unit configured to latch an output signal of the sensing unit.
20. The monitoring circuit according to claim 10 , wherein the fuse array includes an array E-fuse (ARE).