IP Library Granted Patent US 9,647,561
Granted Patent B2
US 9,647,561 · App. 14/510,445 · Granted May 9, 2017

Programmable current limit circuit for a programmable power supply

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Quick Facts
Patent No.
US 9,647,561
App. No.
14/510,445
Granted
May 9, 2017
Kind
B2
Abstract

A control circuit of a power supply is provided. The control circuit includes a circuit and a PWM circuit. The circuit generates a limit signal in response to an output voltage of the power supply for limiting a switching current of a transformer of the power supply. The PWM circuit generates a switching signal in response to a feedback signal and the limit signal for switching the transformer and regulating the output voltage of the power supply. A level of the feedback signal is related to a level of the output voltage of the power supply. The output voltage of the power supply is programmable.

Claims (23)

1. A control circuit of a power supply comprising:

a sample-and-hold circuit coupled to the transformer for generating an input-voltage signal, wherein the input-voltage signal represents an input voltage of the power supply;

a circuit receiving the input-voltage signal and generating a limit signal in response to an output voltage of the power supply and the input-voltage signal for limiting a switching current of a transformer of the power supply; and

a PWM circuit generating a switching signal in response to a feedback signal and the limit signal for switching the transformer and regulating the output voltage of the power supply,

wherein a level of the feedback signal is related to a level of the output voltage of the power supply, and the output voltage of the power supply is programmable.

2. The control circuit as claimed in claim 1 further comprising:

a sample-and-hold circuit to sample a reflected voltage of the transformer for generating an output-voltage signal,

wherein the output-voltage signal represents the output voltage of the power supply.

3. The control circuit as claimed in claim 1 , wherein a level of the limit signal is decreased in response to decrease a level of the output voltage of the power supply.

4. The control circuit as claimed in claim 1 , wherein the control circuit decreases a level of the limit signal when the input voltage is increased.

5. The control circuit as claimed in claim 1 , wherein a level of the limit signal is increased during a power-on period of the power supply.

6. The control circuit as claimed in claim 1 , wherein a level of the limit signal is increased during a period when the output voltage is programmed to a higher value.

7. A method of generating an output voltage of a power supply, comprising:

generating an input-voltage signal by sampling the reflected voltage of the transformer by a sample-and-hold circuit, wherein the input-voltage signal represents an input voltage of the power supply,

generating a limit signal in response to an output voltage of the power supply and the input-voltage signal for limiting a switching current of a transformer of the power supply; and

generating a switching signal in response to a feedback signal and the limit signal for switching the transformer and regulating the output voltage of the power supply,

wherein a level of the feedback signal is related to the level of the output voltage of the power supply, and the output voltage of the power supply is programmable.

8. The method as claimed in claim 7 further comprising:

generating an output-voltage signal by sampling a reflected voltage of the transformer, wherein the output-voltage signal represents the output voltage of the power supply.

9. The method as claimed in claim 7 , wherein a level of the limit signal is decreased in response to decrease a level of the output voltage of the power supply.

10. The method as claimed in claim 7 , wherein a level of the limit signal is decreased when the input voltage is increased.

11. The method as claimed in claim 7 , wherein a level of the limit signal is increased during a power-on period of the power supply.

12. The method as claimed in claim 7 , wherein a level of the limit signal is increased during a period when the output voltage is programmed to a higher value.

Assignments (2)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →