Method, control unit and switching device for switching a cycle in a power transistor circuit
A method for switching a cycle in a power transistor circuit is created, especially in a parallel circuit of power transistors. The method includes the step of specifying a switching time difference and the switching of the power transistors of two switching times which are separate from one another by use of the switching time difference.
1. A method for switching a cycle in a power transistor circuit having power transistors connected in parallel with one another and including a first power transistor, a second power transistor and at least one third power transistor, which comprises the steps of:
specifying a switching time difference of greater than zero between a first switching-on time and a second switching-on time for a first switching cycle;
switching on the first power transistor at the first switching-on time;
switching on at least two other ones of the power transistors at the second switching-on time;
specifying a further switching time difference of greater than zero between a first switching-off time and a second, subsequent switching-off time for the first switching cycle;
switching-off of the first power transistor switched on at first and one of the power transistors, which were switched on at the second switching-on time, at the first switching-off time;
switching off the other one of the power transistors, which was switched-on at the second switching-on time at the second, subsequent switching-off time; and
wherein, in successive switching cycles, the power transistors to be switched at first switching-on times and second switching-off times change cyclically.
2. A control unit for switching a cycle in a power transistor circuit, the power transistor circuit having power transistors connected in parallel with one another and including a first power transistor, a second power transistor and at least one third power transistor, the control unit programmed to perform the steps of:
specifying a switching time difference of greater than zero between a first switching-on time and a second switching-on time for a first switching cycle;
switching on the first power transistor at the first switching-on time;
switching on at least two other ones of the power transistors at the second switching-on time;
specifying a further switching time difference of greater than zero between a first switching-off time and a second, subsequent switching-off time for the first switching cycle;
switching-off of the first power transistor switched on at first and one of the power transistors, which were switched on at the second switching-on time, at the first switching-off time;
switching off the other one of the power transistors, which was switched-on at the second switching-on time at the second, subsequent switching-off time; and
wherein, in successive switching cycles, the power transistors to be switched at first switching-on times and second switching-off times change cyclically.