IP Library Patent Application 14514789
Patent Application
App. No. 14/514,789

METHOD AND A DEVICE FOR CONTROLLING MEMORY-USAGE OF A FUNCTIONAL COMPONENT

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
14/514,789
Abstract

The invention relates to controlling memory-usage of a functional component, e.g. a network interface of a router or a switch. A portion of a virtual memory organized to comprise virtual memory pages is reserved ( 201 ) for the use of the functional component. Mapping between the virtual memory pages and physical memory areas implemented with a physical memory is formed ( 202 ), and data items providing accesses to the physical memory areas are written ( 203 ) to one or more of the physical memory areas. The functional component is enabled to directly access to a physical memory area mapped to a virtual memory page so that the data item that provides access to this physical memory area is read ( 204 ) from the physical memory with the aid of the mapping and a virtual memory address related to the virtual memory page, and the read data item is delivered ( 205 ) to the functional component.

Claims (62)

1 . A device for controlling memory-usage of at least one functional component, the device comprising a processor system configured to:

reserve a portion of a virtual memory, the reserved portion of the virtual memory comprising one or more mutually non-overlapping and contiguous virtual memory pages,

form mapping between the virtual memory pages and physical memory areas implemented with a physical memory, a first one of the physical memory areas being mapped to a first one of the virtual memory pages, and

write, to one or more of the physical memory areas mapped to the virtual memory pages, data items providing accesses to the physical memory areas,

wherein, in order to enable the functional component to access to the first one of the physical memory areas, the processor system is further configured to:

read, from the physical memory and on the basis of at least the mapping and a virtual memory address related to the first one of the virtual memory pages, a particular one of the data items that provides access to the first one of the physical memory areas, and

deliver information indicated by the read data item to the functional component so as to enable the functional component to access to the first one of the physical memory areas.

2 . A device according to claim 1 , wherein the processor system is configured to reserve the portion of the virtual memory so that the reserved portion of the virtual memory is contiguous.

3 . A device according to claim 1 , wherein the processor system is configured to write the data items so that each of the data items includes a physical memory address related to the physical memory area accessible with the aid of the data item under consideration.

4 . A device according to claim 1 , wherein the processor system is configured to write each of the data items to a particular one of the physical memory areas that is accessible with the aid of the data item under consideration.

5 . A device according to claim 4 , wherein the processor system is configured, in order to read the one of the data items, to deliver the virtual memory address related to the first one of the virtual memory pages to a memory management unit connected to the physical memory and configured to translate the virtual memory address to a physical memory address in accordance with the mapping.

6 . A device according to claim 1 , wherein the processor system is configured to write the data items to a second one of the physical memory areas mapped to a second one of the virtual memory pages.

7 . A device according to claim 6 , wherein the processor system is configured, in order to read the one of the data items, to:

obtain, on the basis of the virtual memory address related to the first one of the virtual memory pages, another virtual memory address related to the second one of the virtual memory pages and providing access to the one of the data items, and

deliver the other virtual memory address to a memory management unit connected to the physical memory and configured to translate the other virtual memory address to a physical memory address in accordance with the mapping.

8 . A device according to claim 7 , wherein the processor system is configured to maintain a look-up table of virtual memory addresses related to the second one of the virtual memory pages and providing accesses to the data items, and, in order to obtain the other virtual memory address related to the second one of the virtual memory pages and providing access to the one of the data items, to carry out a look-up using the virtual memory address related to the first one of the virtual memory pages as a look-up key.

9 . A device according to claim 7 , wherein the processor system is configured to carry out one or more logical operations for obtaining, on the basis of the virtual memory address related to the first one of the virtual memory pages, the other virtual memory address related to the second one of the virtual memory pages and providing access to the one of the data items.

10 . A device according to claim 1 , wherein the processor system is configured to prevent changes of the mapping between the virtual memory pages and the physical memory areas in situations where another mapping between another virtual memory and other physical memory areas is formed or changed.

11 . A network element comprising:

one or more functional components for controlling and carrying out data transfer between the network element and a data transfer network,

a physical memory for buffering data to be transferred, and

a processor system connected to the physical memory and to the one or more functional components,

wherein the processor system is configured to:

reserve a portion of a virtual memory, the reserved portion of the virtual memory comprising one or more mutually non-overlapping and contiguous virtual memory pages,

form mapping between the virtual memory pages and physical memory areas implemented with the physical memory, a first one of the physical memory areas being mapped to a first one of the virtual memory pages, and

write, to one or more of the physical memory areas mapped to the virtual memory pages, data items providing accesses to the physical memory areas,

wherein, in order to enable at least one of the functional components to access to the first one of the physical memory areas, the processor system is further configured to:

read, from the physical memory and on the basis of at least the mapping and a virtual memory address related to the first one of the virtual memory pages, a particular one of the data items that provides access to the first one of the physical memory areas, and

deliver information indicated by the read data item to the functional component under consideration so as to enable the functional component to access to the first one of the physical memory areas.

12 . A network element according to claim 11 , wherein each of the functional components is configured to use linked lists of the physical memory areas for buffering the data received and to be transmitted.

13 . A network element according to claim 11 , wherein:

each of the virtual memory pages is composed of two or more mutually non-overlapping, equal-sized, and contiguous virtual memory sub-pages, and

the physical memory area mapped to the virtual memory page under consideration comprises two or more mutually non-overlapping, equal-sized, and contiguous physical memory sub-areas each corresponding to one of the virtual memory sub-pages.

14 . A network element according to claim 13 , wherein each of the functional components is configured to use linked lists of the physical memory sub-areas for buffering the data received and to be transmitted.

15 . A network element according to claim 11 , wherein the network element is at least one of the following: an Internet Protocol “IP” router, an Ethernet switch, a multiprotocol label switching “MPLS” switch, a network element of a software defined network “SDN”, an Asynchronous Transfer Mode “ATM” switch.

16 . A method for controlling memory-usage of at least one functional component the method comprising:

reserving a portion of a virtual memory, the reserved portion of the virtual memory comprising one or more mutually non-overlapping and contiguous virtual memory pages,

forming mapping between the virtual memory pages and physical memory areas implemented with a physical memory, a first one of the physical memory areas being mapped to a first one of the virtual memory pages, and

writing, to one or more of the physical memory areas mapped to the virtual memory pages, data items providing accesses to the physical memory areas, wherein, in order to enable the functional component to access to the first one of the physical memory areas, the method further comprises:

reading, from the physical memory and on the basis of at least the mapping and a virtual memory address related to the first one of the virtual memory pages, a particular one of the data items that provides access to the first one of the physical memory areas, and

delivering information indicated by the read data item to the functional component so as to enable the functional component to access to the first one of the physical memory areas.

17 . A method according to claim 16 , wherein the portion of the virtual memory is contiguous.

18 . A method according to claim 16 , wherein each of the data items includes a physical memory address related to the physical memory area accessible with the aid of the data item under consideration.

19 . A method according to claim 16 , wherein each of the data items is written to a particular one of the physical memory areas that is accessible with the aid of the data item under consideration.

20 . A method according to claim 19 , wherein the method comprises, in order to read the one of the data items, delivering the virtual memory address related to the first one of the virtual memory pages to a memory management unit connected to the physical memory and configured to translate the virtual memory address to a physical memory address in accordance with the mapping.

21 . A method according to claim 16 , wherein the data items are written to a second one of the physical memory areas mapped to a second one of the virtual memory pages.

22 . A method according to claim 21 , wherein the method comprises, in order to read the one of the data items:

obtaining, on the basis of the virtual memory address related to the first one of the virtual memory pages, another virtual memory address that is related to the second one of the virtual memory pages and provides access to the one of the data items, and

delivering the other virtual memory address to a memory management unit connected to the physical memory and configured to translate the other virtual memory address to a physical memory address in accordance with the mapping.

23 . A method according to claim 22 , wherein the method comprises maintaining a look-up table of virtual memory addresses related to the second one of the virtual memory pages and providing accesses to the data items, and, in order to obtain the other virtual memory address related to the second one of the virtual memory pages and providing access to the one of the data items, carrying out a look-up using the virtual memory address related to the first one of the virtual memory pages as a look-up key.

24 . A method according to claim 22 , wherein the method comprises carrying out one or more logical operations for obtaining, on the basis of the virtual memory address related to the first one of the virtual memory pages, the other virtual memory address related to the second one of the virtual memory pages and providing access to the one of the data items.

25 . A method according to claim 16 , wherein the method comprises preventing changes of the mapping between the virtual memory pages and the physical memory areas in situations where another mapping between another virtual memory and other physical memory areas is formed or changed.

26 . A method according to claim 16 , wherein:

each of the virtual memory pages is composed of two or more mutually non-overlapping, equal-sized, and contiguous virtual memory sub-pages, and

the physical memory area mapped to the virtual memory page under consideration comprises two or more mutually non-overlapping, equal-sized, and contiguous physical memory sub-areas each corresponding to one of the virtual memory sub-pages.

27 . A non-transitory computer readable medium encoded with a computer program for controlling memory-usage of at least one functional component, the computer program comprising computer executable instructions for controlling a programmable processor to:

reserve a portion of a virtual memory, the reserved portion of the virtual memory comprising one or more mutually non-overlapping and contiguous virtual memory pages,

form mapping between the virtual memory pages and physical memory areas implemented with a physical memory, a first one of the physical memory areas being mapped to a first one of the virtual memory pages, and

write, to one or more of the physical memory areas mapped to the virtual memory pages, data items providing accesses to the physical memory areas,

wherein the computer program further comprises computer executable instructions for controlling the programmable processor to carry out the following actions in order to enable the functional component to access to the first one of the physical memory areas:

reading, from the physical memory and on the basis of at least the mapping and a virtual memory address related to the first one of the virtual memory pages, a particular one of the data items that provides access to the first one of the physical memory areas, and

delivering information indicated by the read data item to the functional component so as to enable the functional component to access to the first one of the physical memory areas.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Oct 27, 2018
From: CERBERUS BUSINESS FINANCE, LLC
To: CORIANT OY (FORMERLY TELLABS OY)
Reel/Frame 047727/0035 →
CHANGE OF NAME Recorded Mar 25, 2016
From: TELLABS OY
To: CORIANT OY
Reel/Frame 038278/0221 →
SECURITY INTEREST Recorded Jul 20, 2015
From: CORIANT OY (FORMERLY KNOWN AS TELLABS OY
To: CERBERUS BUSINESS FINANCE, LLC, AS THE COLLATERAL AGENT
Reel/Frame 036132/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2014
From: HALLIVUORI, VILLE; KAMUNEN, KARI; KUUSISAARI, JUHAMATTI
To: TELLABS OY
Reel/Frame 033961/0108 →