Method and apparatus for a buck converter with pulse width modulation and pulse frequency modulation mode

1. A buck converter device having a pulse frequency modulation (PFM) wherein a frequency is fixed using a minimum off-time operation, wherein a minimum off time is proportional to 1−D, wherein D is a duty cycle, wherein the buck converter device is configured to create a threshold voltage above ground proportional to a difference between a power supply voltage Vdd and a reference voltage Vref, comprising:

a comparator providing an output signal of the minimum off time;

a first amplifier;

a p-channel MOSFET whose gate is connected to an output of said first amplifier providing the threshold voltage to a positive terminal of said comparator;

a second amplifier; and,

a second p-channel MOSFET whose gate is connected to an output of said second amplifier providing a signal to a negative terminal of said comparator.

2. The buck converter of claim 1 , wherein a negative input terminal of said first amplifier is the reference voltage Vref.

3. The buck converter of claim 2 , wherein a positive input of said first amplifier is electrically connected to a first resistor and said first p-channel MOSFET source.

4. The buck converter of claim 3 , wherein said first p-channel MOSFET drain is electrically connected to a second resistor element and provides a positive threshold voltage input to said comparator whose threshold voltage is proportional to the difference between a power supply voltage Vdd and the reference voltage Vref.

5. The buck converter of claim 4 , wherein said second amplifier negative input is electrically connected to a resistor divider network further comprising a third resistor and a fourth resistor providing a voltage to said negative input proportional to the power supply voltage.

6. The buck converter of claim 5 , wherein said comparator negative input is electrically connected to a switch providing a start of an on-time to allow for re-initiation at a next off-time.

7. The buck converter of claim 6 , wherein said comparator negative input is electrically connected to a capacitor providing a rate of change across a capacitor is proportional to the power supply voltage Vdd.

8. The buck converter of claim 7 , wherein said capacitor is charged to the threshold voltage is a time proportional to (Vdd−Vref)/Vdd.

9. A buck converter device having a pulse frequency modulation (PFM) where a frequency is fixed, with minimum off-time operation, whose minimum off time is proportional to the 1−D, where D is the duty cycle, the buck converter device comprising:

a comparator providing an output signal of the minimum off time;

an amplifier, wherein a negative input terminal of said amplifier is the reference voltage Vref and a positive input of said amplifier is electrically connected to a first resistor and to a source of a first p-channel MOSFET; and

said p-channel MOSFET whose gate is connected to an output of said amplifier providing a threshold voltage above ground proportional to a difference between a power supply voltage Vdd and a reference voltage Vref to a positive terminal of said comparator and wherein a drain of said first p-channel MOSFET is electrically connected to a second resistor element and providing a positive threshold voltage input to said comparator whose threshold voltage is proportional to a difference between the power supply voltage Vdd and the reference voltage Vref.

10. The buck converter of claim 9 , wherein said comparator negative input is electrically connected to a switch providing a start of an on-time to allow for re-initiation at a next off-time.

11. The buck converter of claim 10 , wherein said comparator negative input is electrically connected to a capacitor of voltage V 1 providing a rate of change across the capacitor is linear and proportional to the power supply voltage Vdd.

12. The buck converter of claim 11 , wherein said comparator negative input is electrically connected to a series combination of a resistor and a switch.

13. The buck converter of claim 12 , wherein said converter provides a fixed frequency operation.

14. A method of pulse frequency modulation (PFM) with low loads, comprising steps:

providing a buck converter having a PFM mode comprising a first amplifier, a second amplifier, a comparator, a first p-channel MOSFET, a second p-channel MOSFET (PMOS), a first resistor element, a second resistor element, a third resistor element, a fourth resistor element, a capacitor element, and a switch;

creating a replica of the reference voltage Vref proportional to the difference between the power supply voltage Vdd and the reference voltage Vref;

creating a threshold voltage above ground proportional to the difference between Vdd and Vref;

establishing a voltage from said third resistor and said fourth resistor proportional to power supply Vdd on said second amplifier;

creating a replica of voltage on said fifth resistor equal to voltage across said third resistor proportional to the supply voltage Vdd;

establishing a voltage on said capacitor whose rate of change is proportional to power supply Vdd;

establishing a time to charge the capacitor to a threshold voltage proportional to (Vdd−Vref)/Vdd; and

establishing a minimum off-time on an output of said comparator;

operating said PFM mode with a fixed frequency, wherein the fixed frequency is set using a minimum off-time; and

setting the minimum off time to be proportional to (1−D), where D is a duty cycle of the buck converter;

wherein the buck converter is configured to create a threshold voltage above ground proportional to a difference between a power supply voltage Vdd and a reference voltage Vref.

15. The method of pulse frequency modulation (PFM) of claim 14 further comprising the step:

resetting the switch at a start time of an on-time.

16. A method of pulse frequency modulation (PFM) with low loads comprising of the following steps:

providing a buck converter comprising of an amplifier, a comparator, a p-channel MOSFET, a first resistor element, a second resistor element, a third resistor element, a capacitor element, a first switch, and a second switch;

creating a replica of a reference voltage Vref proportional to the difference between Vdd and Vref;

creating a threshold voltage above ground proportional to the difference between a power supply voltage Vdd and the reference voltage Vref;

establishing a voltage on said capacitor whose rate of change is proportional to power supply Vdd;

establishing a time to charge the capacitor to a threshold voltage proportional to (Vdd−Vref)/Vdd; and

establishing a minimum off time on an output of said comparator.