Magnetic core inductor integrated with multilevel wiring network
An inductor is integrated into a multilevel wiring network of a semiconductor integrated circuit. The inductor includes a planar magnetic core and a conductive winding. The conductive winding turns around in generally spiral manner on the outside of the planar magnetic core. The conductive winding is piecewise constructed of wire segments and of VIAs. The wire segments pertain to at least two wiring planes and the VIAs are interconnecting the at least two wiring planes. Methods for such integration, and for fabricating laminated planar magnetic cores are also presented.
1. A processor, comprising:
a semiconductor integrated circuit, wherein said semiconductor integrated circuit comprises a multilevel wiring network, wherein said semiconductor integrated circuit operates with a plurality of DC supply voltages; and
a DC to DC voltage converter which delivers at least one of said DC supply voltages for said semiconductor integrated circuit, wherein said DC to DC voltage converter comprises an inductor, and wherein said inductor is integrated thereinto said multilevel wiring network, wherein said inductor comprises a planar magnetic core and a conductive winding, wherein said conductive winding turns around in generally spiral manner on the outside of said planar magnetic core, said planar magnetic core having a laminated configuration comprising at least one layer of a magnetic material and at least one current rectifying layer;
wherein the current rectifying layer comprises a p-type semiconductor, the p-type semiconductor having a first work function less than a second work function of the magnetic material; and
wherein the laminated configuration further comprises an interface metal layer disposed on said p-type semiconductor, the interface layer having a work function less than said first work function of said p-type semiconductor.
2. The processor of claim 1 , further comprising a second layer of said magnetic material disposed on said interface metal layer.
3. A processor, comprising:
a semiconductor integrated circuit, wherein said semiconductor integrated circuit comprises a multilevel wiring network, wherein said semiconductor integrated circuit operates with a plurality of DC supply voltages; and
a DC to DC voltage converter which delivers at least one of said DC supply voltages for said semiconductor integrated circuit, wherein said DC to DC voltage converter comprises an inductor, and wherein said inductor is integrated thereinto said multilevel wiring network, wherein said inductor comprises a planar magnetic core and a conductive winding, wherein said conductive winding turns around in generally spiral manner on the outside of said planar magnetic core, said planar magnetic core having a laminated configuration comprising at least one layer of a magnetic material and at least one current rectifying layer;
wherein the current rectifying layer comprises a n-type semiconductor, the n-type semiconductor having a first work function greater than a second work function of the magnetic material; and
wherein the laminated configuration further comprises an interface metal layer disposed on said n-type semiconductor, the interface layer having a work function greater than said first work function of said n-type semiconductor.
4. The processor of claim 3 , further comprising a second layer of said magnetic material disposed on said interface metal layer.