Universal adiabatic quantum computing with superconducting qubits
View Patent ↗A quantum processor is operable as a universal adiabatic quantum computing system. The quantum processor includes physical qubits, with at least a first and second communicative coupling available between pairs of qubits via an in-situ tunable superconducting capacitive coupler and an in-situ tunable superconducting inductive coupler, respectively. Tunable couplers provide diagonal and off-diagonal coupling. Compound Josephson junctions (CJJs) of the tunable couplers are responsive to a flux bias to tune a sign and magnitude of a sum of a capacitance of a fixed capacitor and a tunable capacitance which is mediated across a pair of coupling capacitors. The qubits may be hybrid qubits, operable in a flux regime or a charge regime. Qubits may include a pair of CJJs that interrupt a loop of material and which are separated by an island of superconducting material which is voltage biased with respect to a qubit body.
1. A quantum processor, comprising:
at least a first pair of qubits;
a first in-situ tunable superconducting capacitive coupler having a tunable capacitance, the first in-situ tunable superconducting capacitive coupler positioned to selectively provide a first communicative coupling between the qubits of the first pair of qubits; and
a first in-situ tunable superconducting inductive coupler having a tunable inductance, the first in-situ tunable superconducting inductive coupler positioned to selectively provide a second communicative coupling between the qubits of the first pair of qubits.
2. The quantum processor of claim 1 wherein each of the qubits of the first pair of qubits is a respective hybrid qubit which is operable in a flux regime or in a charge regime based on a ratio of Josephson energy to charging energy of the hybrid qubit.
3. The quantum processor of claim 2 , further comprising:
at least one readout device positioned and operable to selectively determine a state of at least one of the hybrid qubits.
4. The quantum processor of claim 2 wherein each of the qubits of the first pair of qubits comprises:
a qubit body, the qubit body comprising a loop of that is superconductive below a critical temperature; and
a pair of compound Josephson junctions that interrupt the loop of material, the pair of compound Josephson junctions separated by an island of superconducting material, and the island is voltage biased with respect to the qubit body.
5. The quantum processor of claim 4 wherein the first in-situ tunable superconducting capacitive coupler is located between the island of each of the qubits of the first pair of qubits, and the first in-situ tunable superconducting inductive coupler is located between the qubit body of each of the qubits of the first pair of qubits.
6. The quantum processor of claim 4 wherein one of the first in-situ tunable superconducting capacitive coupler or the first in-situ tunable superconducting inductive coupler provides a diagonal coupling in the computational basis and the other one of the first in-situ tunable superconducting capacitive coupler and the first in-situ tunable superconducting inductive coupler provides an off-diagonal coupling in the computational basis.
7. The quantum processor of claim 4 wherein each of the compound Josephson junctions is inductively coupled to a bias line, the bias line shared by at least one of the qubits of the pair of qubits.
8. The quantum processor of claim 1 wherein one of the first in-situ tunable superconducting capacitive coupler or the first in-situ tunable superconducting inductive coupler provides a diagonal coupling in the computational basis and the other one of the first in-situ tunable superconducting capacitive coupler and the first in-situ tunable superconducting inductive coupler provides an off-diagonal coupling in the computational basis.
9. The quantum processor of claim 1 wherein the first in-situ tunable superconducting capacitive coupler provides an off-diagonal coupling in the computational basis.
10. The quantum processor of claim 1 wherein the quantum processor is operable as a universal adiabatic quantum computing system.