Granted Patent B2

US 9,626,514 · App. 14/521,341 · Granted Apr 18, 2017

Abstract

Claims (135)

1. A method for selectively enabling a microprocessor-based system, comprising:

obtaining state information describing at least one microprocessor-based system operating condition;

determining at least one valid hash value;

obtaining candidate authorization information from a user of said microprocessor-based system;

generating a candidate hash value by applying a hashing algorithm to at least one of said candidate authorization information, or said state information;

comparing said candidate hash value and said valid hash value; and

enabling said microprocessor-based system if said candidate hash value matches said valid hash value.

2. The method of claim 1 , wherein said determining at least one valid hash value comprises:

determining said valid hash value based on said state information.

3. The method of claim 1 , wherein said determining at least one valid hash value comprises:

referencing a list of valid hash values.

4. The method of claim 1 , further comprising:

before said obtaining state information, executing a power-up sequence.

5. The method of claim 1 , further comprising:

after said enabling said microprocessor-based system if said candidate hash value matches said valid hash value, periodically checking for a reset condition; and

if said reset condition is detected:

executing a power-down sequence;

waiting for a power-up condition; and

upon detecting said power-up condition, executing a power-up sequence.

6. The method of claim 5 , further comprising:

obtaining additional state information; and

storing said additional state information in a memory.

7. The method of claim 6 , wherein said memory comprises a tamper resistant, non-volatile memory.

8. The method of claim 1 , wherein said obtaining state information describing at least one microprocessor-based system operating condition comprises:

retrieving at least a portion of said state information from a memory.

9. The method of claim 8 , wherein said memory comprises a tamper resistant, non-volatile memory.

10. The method of claim 1 , wherein said hashing algorithm comprises a one-way hashing algorithm.

11. The method of claim 1 , wherein said determining at least one valid hash value comprises:

locating said valid hash value within a table of valid hash values indexed by said state information.

12. The method of claim 1 , wherein said generating a candidate hash value by applying a hashing algorithm comprises:

applying said hashing algorithm to a catenation of said candidate authorization information and said state information.

13. The method of claim 1 , wherein said state information comprises:

at least one of:

geographic location;

geographic region;

date;

a range of dates;

a time; or

a range of times.

14. The method of claim 1 , wherein said state information comprises a prior usage history of said microprocessor-based system.

15. A method for selectively enabling a microprocessor-based system, comprising:

obtaining state information describing one or more operating conditions;

locating a valid hash value within a table of valid hash values indexed by said state information;

obtaining candidate authorization information from a user of said microprocessor-based system;

generating a candidate hash value by applying a one-way hashing algorithm to said candidate authorization information;

comparing said candidate hash value and said valid hash value;

comparing said state information to a valid state information; and

enabling said microprocessor-based system if said candidate hash value matches said valid hash value and if said state information matches said valid state information.

16. An apparatus for selectively enabling a microprocessor-based system, comprising:

circuitry for obtaining state information describing at least one microprocessor-based system operating condition;

circuitry for determining at least one valid hash value;

circuitry for obtaining candidate authorization information from a user of said microprocessor-based system;

circuitry for generating a candidate hash value by applying a hashing algorithm to at least one of said candidate authorization information, or said state information;

circuitry for comparing said candidate hash value and said valid hash value; and

circuitry for enabling said microprocessor-based system if said candidate hash value matches said valid hash value.

17. The apparatus of claim 16 , wherein said circuitry for determining at least one valid hash value comprises circuitry for determining said valid hash value based on said state information.

18. The apparatus of claim 16 , wherein said circuitry for determining at least one valid hash value comprises circuitry for referencing a list of valid hash values.

19. The apparatus of claim 16 , further comprising: circuitry for comparing said state information to a valid state information;

and wherein

circuitry for generating a candidate hash value by applying a hashing algorithm to at least one of said candidate authorization information, or said state information comprises circuitry for generating a candidate hash value by applying a hashing algorithm to said candidate authorization information; and

circuitry for enabling said microprocessor-based system if said candidate hash value matches said valid hash value comprises circuitry for enabling said microprocessor-based system if said candidate hash value matches said valid hash value and if said state information matches said valid state information.

20. The apparatus of claim 16 , further comprising:

circuitry for periodically checking for a reset condition after said enabling said microprocessor-based system; and

if said reset condition is detected:

executing a power-down sequence of said microprocessor-based system;

waiting for a power-up condition; and

upon detecting said power-up condition, executing said power-up sequence of said microprocessor-based system.

21. The apparatus of claim 16 , further comprising:

circuitry for obtaining additional state information; and

circuitry for storing said additional state information in a memory.

22. The apparatus of claim 21 , wherein said memory comprises a tamper resistant, non-volatile memory.

23. The apparatus of claim 16 , wherein said circuitry for obtaining state information comprises circuitry for retrieving at least a portion of said state information from a memory.

24. The apparatus of claim 16 , wherein said state information includes at least one indication of a proximity to at least one of a specified location or a specified device, and wherein circuitry for enabling said microprocessor-based system if said candidate hash value matches said valid hash value comprises:

circuitry for causing the at least one microprocessor-based system to enter a lower activity state if the circuitry for comparing indicates that a current location of the microprocessor-based system is outside of the specified region.

25. The apparatus of claim 16 , wherein said hashing algorithm comprises is a one-way hashing algorithm.

26. The apparatus of claim 16 , wherein said circuitry for determining at least one valid hash value comprises:

circuitry for locating said valid hash value within a table of valid hash values indexed by said state information.

27. The apparatus of claim 16 , wherein said circuitry for generating a candidate hash value by applying a hashing algorithm comprises:

circuitry for applying said hashing algorithm to a catenation of said candidate authorization information and said state information.

28. The apparatus of claim 16 , wherein said state information comprises:

at least one of:

geographic location;

geographic region;

date;

a range of dates;

a time; or

a range of times.

29. The apparatus of claim 16 , wherein said state information describes a prior usage history of said microprocessor-based system.

30. The apparatus of claim 16 , wherein circuitry for obtaining candidate authorization information from a user of said microprocessor-based system comprises:

circuitry for obtaining a password from a user of said microprocessor-based system.

31. The apparatus of claim 16 , wherein circuitry for obtaining candidate authorization information from a user of said microprocessor-based system comprises:

circuitry for obtaining a password from a user of said microprocessor-based system, the password being specific to operation of said microprocessor-based system within a particular geographic region.

32. The apparatus of claim 16 , wherein circuitry for obtaining state information describing at least one microprocessor-based system operating condition comprises:

circuitry for obtaining a current location indication of the at least one microprocessor-based system.

33. The apparatus of claim 16 , wherein circuitry for obtaining state information describing at least one microprocessor-based system operating condition comprises:

circuitry for obtaining a current location indication of the at least one microprocessor-based system;

and wherein circuitry for generating a candidate hash value by applying a hashing algorithm to at least one of said candidate authorization information, or said state information comprises:

circuitry for generating a candidate hash value by applying a hashing algorithm the current location indication of the at least one microprocessor-based system.

34. The apparatus of claim 33 , further comprising:

circuitry for at least partially disabling the at least one microprocessor-based system when the current location indication is outside of a specified geographic region.

35. The apparatus of claim 33 , further comprising:

circuitry for causing the at least one microprocessor-based system to enter a lower activity state if the current location indication is outside of a specified geographic region.

36. The apparatus of claim 33 , further comprising:

circuitry for causing the at least one microprocessor-based system to enter a powered-down state if the current location indication is outside of a specified geographic region.

37. The apparatus of claim 16 , wherein circuitry for obtaining state information describing at least one microprocessor-based system operating condition comprises:

circuitry for obtaining a current location indication of the at least one microprocessor-based system;

and wherein circuitry for generating a candidate hash value by applying a hashing algorithm to at least one of said candidate authorization information, or said state information comprises:

circuitry for generating a candidate hash value by applying a hashing algorithm to the current location indication of the at least one microprocessor-based system;

and wherein the system further comprises:

circuitry for causing the at least one microprocessor-based system to enter a lower activity state if the current location indication indicates that the at least one microprocessor-based system has been transported outside of a specified region.

38. The apparatus of claim 37 , wherein circuitry for at least partially disabling the at least one microprocessor-based system when the current location indication is outside of a specified geographic region comprises:

circuitry for causing the at least one microprocessor-based system to enter a lower activity state if the current location indication is outside of a specified region, the specified region being defined based on a proximity to a specified location.

39. The apparatus of claim 37 , further comprising:

circuitry for re-obtaining candidate authorization information from the user of said microprocessor-based system before the at least one microprocessor-based system is permitted to return from the lower activity state.

40. The apparatus of claim 37 , further comprising:

circuitry for re-obtaining at least one of a password or passphrase from the user of said microprocessor-based system before the at least one microprocessor-based system is permitted to return from the lower activity state.

41. The apparatus of claim 16 , wherein circuitry for generating a candidate hash value by applying a hashing algorithm comprises:

circuitry for generating a secure hash value by applying a secure hashing algorithm.

42. The apparatus of claim 16 , wherein circuitry for generating a candidate hash value by applying a hashing algorithm comprises:

circuitry for generating a secure hash value by applying a one-way hashing algorithm.

43. The apparatus of claim 16 , wherein circuitry for determining at least one valid hash value comprises:

circuitry for determining at least one valid hash value representing a specified geographic region in which the at least one microprocessor-based system is permitted to be operational.

44. The apparatus of claim 16 , wherein circuitry for determining at least one valid hash value comprises:

circuitry for determining at least one valid hash value representing a specified location proximate which the at least one microprocessor-based system is permitted to be operational.

45. The apparatus of claim 16 , wherein circuitry for obtaining state information describing at least one microprocessor-based system operating condition comprises:

circuitry for obtaining a history of one or more locations of the at least one microprocessor-based system.

46. The apparatus of claim 16 , wherein circuitry for obtaining candidate authorization information from a user of said microprocessor-based system comprises:

circuitry for obtaining at least one of a passphrase, an electronic identification, or a biometric information from a user of said microprocessor-based system.

47. An apparatus for selectively enabling a microprocessor-based system, comprising:

circuitry for obtaining state information describing one or more operating conditions;

circuitry for locating a valid hash value within a table of valid hash values indexed by said state information;

circuitry for obtaining candidate authorization information from a user of said microprocessor-based system;

circuitry for generating a candidate hash value by applying a one-way hashing algorithm to at least one of said candidate authorization information or said state information;

circuitry for comparing said candidate hash value and said valid hash value; and

circuitry for enabling said microprocessor-based system if said candidate hash value matches said valid hash value.

Assignments (11)