IP Library Granted Patent US 9,249,012
Granted Patent B2
US 9,249,012 · App. 14/521,441 · Granted Feb 2, 2016

Method and device of MEMS process control monitoring and packaged MEMS with different cavity pressures

Inventor: Te-Hsi “Terrence” Lee (San Jose, CA)
Assignee: mCube, Inc.
B81C1/00269B81C1/00198B81C99/004
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Quick Facts
Patent No.
US 9,249,012
App. No.
14/521,441
Granted
Feb 2, 2016
Kind
B2
Abstract

A method for fabricating an integrated MEMS device and the resulting structure therefore. A control process monitor comprising a MEMS membrane cover can be provided within an integrated CMOS-MEMS package to monitor package leaking or outgassing. The MEMS membrane cover can separate an upper cavity region subject to leaking from a lower cavity subject to outgassing. Differential changes in pressure between these cavities can be detecting by monitoring the deflection of the membrane cover via a plurality of displacement sensors. An integrated MEMS device can be fabricated with a first and second MEMS device configured with a first and second MEMS cavity, respectively. The separate cavities can be formed via etching a capping structure to configure each cavity with a separate cavity volume. By utilizing an outgassing characteristic of a CMOS layer within the integrated MEMS device, the first and second MEMS cavities can be configured with different cavity pressures.

Claims (32)

1. A method for fabricating an integrated MEMS (Micro Electro Mechanical System) device comprising:

receiving a semiconductor substrate having a plurality of CMOS devices formed thereon, wherein the semiconductor substrate includes an upper surface, and wherein the upper surface of the semiconductor substrate is associated with an outgassing characteristic;

forming a material layer on top of the semiconductor substrate, wherein the material layer includes a first lower cavity and a second lower cavity;

forming a MEMS material layer comprising a first MEMS device on top of the first lower cavity and a second MEMS device on top of the second lower cavity;

forming a capping structure comprising a plurality of caps including a first upper cap and a second upper cap, wherein forming the capping structure includes:

receiving a capping structure,

forming a dielectric layer above a surface of the capping substrate, and

etching portions of the dielectric layer to expose portions of the surface of the capping substrate and to form the first upper cap and the second upper cap;

coupling the capping structure to the MEMS material layer at a bonding interface, wherein the first upper cap and first lower cavity from a first MEMS cavity, wherein the first MEMS device is disposed therein, wherein the second upper cap and the second lower cavity form a second MEMS cavity, wherein the second MEMS device is disposed therein, wherein the first MEMS cavity is separate from the second MEMS cavity; and

wherein the outgassing characteristic of the semiconductor substrate causes a gas pressure of the first MEMS cavity to be different from a gas pressure of the second MEMS cavity.

2. The method of claim 1 wherein an initial gas pressure of the first MEMS cavity and an initial gas pressure of the second MEMS cavity are substantially similar.

3. The method of claim 1 wherein a volume of the first MEMS cavity is different form a volume of the second MEMS cavity.

4. The method of claim 1

wherein the first MEMS device comprises a gyroscope; and

wherein the second MEMS device comprises an accelerometer.

5. The method of claim 1 wherein a volume of the first lower cavity is substantially similar to a volume of the second lower cavity.

6. The method of claim 1 wherein a volume of the second upper cap is less than a volume of the first upper cap.

7. The method of claim 6 wherein a depth of the second upper cap is less than a depth of the first upper cap.

8. The method of claim 1 wherein the forming of the material layer on top of the semiconductor substrate comprises

forming a dielectric layer above the upper surface of the semiconductor substrate; and

etching portions of the dielectric layer to expose portions of the upper surface of the semiconductor substrate and to form the first lower cavity and the second lower cavity.

9. A method for fabricating an integrated MEMS (Micro Electro Mechanical System) device comprising:

receiving a semiconductor substrate having a plurality of CMOS devices formed thereon, wherein the semiconductor substrate includes an upper surface, and wherein the upper surface of the semiconductor substrate is associated with an outgassing characteristic;

forming a material layer on top of the semiconductor substrate, wherein the material layer includes a first lower cavity and a second lower cavity;

forming a MEMS material layer comprising a first MEMS device on top of the first lower cavity and a second MEMS device on top of the second lower cavity;

forming a capping structure comprising a plurality of caps including a first upper cap and a second upper cap, wherein the forming of the capping structure comprises:

receiving a capping substrate,

forming a dielectric layer above a surface of the capping substrate, and

etching portions of the dielectric layer to expose portions of the surface of the capping substrate and to form the first upper cap,

wherein the second upper cap is not exposed to portions of the surface of the capping structure,

coupling the capping structure to the MEMS material layer at a bonding interface, wherein the first upper cap and first lower cavity from a first MEMS cavity, wherein the first MEMS device is disposed therein, wherein the second upper cap and the second lower cavity form a second MEMS cavity, wherein the second MEMS device is disposed therein, wherein the first MEMS cavity is separate from the second MEMS cavity; and

wherein the outgassing characteristic of the semiconductor substrate causes a gas pressure of the first MEMS cavity to be different from a gas pressure of the second MEMS cavity.

Assignments (6)
PARTIAL TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 61948/0764 Recorded May 2, 2025
From: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS AGENT
To: MOVELLA INC.
Reel/Frame 071161/0930 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Nov 15, 2022
From: MOVELLA INC.
To: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS AGENT
Reel/Frame 061948/0764 →
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2022
From: SILICON VALLEY BANK
To: MOVELLA INC. (FORMERLY KNOWN AS MCUBE, INC.)
Reel/Frame 061763/0864 →
SECURITY INTEREST Recorded Mar 2, 2022
From: MOVELLA INC. (FKA MCUBE, INC.)
To: SILICON VALLEY BANK
Reel/Frame 059147/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2015
From: CHENG, JI; ZHAO, JIAN
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 036213/0347 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2015
From: LEE, TE-HSI TERRENCE
To: MCUBE, INC.
Reel/Frame 034847/0214 →
Continuity (2)
Provisional Application 61894910 · Oct 23, 2013
Related Publication 20150111332A1 · Apr 23, 2015