IP Library Granted Patent US 9,847,462
Granted Patent B2
US 9,847,462 · App. 14/525,478 · Granted Dec 19, 2017

Array substrate for mounting chip and method for manufacturing the same

Inventors: Ki Myung Nam (Cheonan-si, KR); Seung Ho Park (Hwaseong-si, KR); Young Chul Jun (Ansan-si, KR)
Assignee: Point Engineering Co., Ltd.
H01L33/486H01L24/97H01L2224/48091H01L2924/12041H01L2933/0033
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Quick Facts
Patent No.
US 9,847,462
App. No.
14/525,478
Granted
Dec 19, 2017
Kind
B2
Abstract

Provided is an array substrate for mounting a chip. The array substrate includes a plurality of conductive layers unidirectionally stacked with respect to an original chip substrate; a plurality of insulating layers alternately stacked with the plurality of conductive layers, and electrically separate the plurality of conductive layers; and a cavity having a groove of a predetermined depth with respect to a region including the plurality of insulating layers in an upper surface of the original chip substrate. Accordingly, since the optical device array of a single structure is used as a line source of light, an emission angle emitted from the optical device is great, it is not necessary to form an interval for supplying an amount of light, and a display device can be simply constructed. Further, since it is not necessary to perform soldering a plurality of LED packages on a printed circuit board, a thickness of a back light unit can be reduced.

Claims (7)

1. An array substrate for mounting a chip to a circuit board, the array substrate comprising:

a plurality of conductive parts arranged in one direction, whereon a plurality of chips are mounted in the one direction, each of the plurality of conductive parts having a chip-mounting surface, and a back surface opposite the chip-mounting surface for mounting the array substrate to the circuit board;

one or more insulating parts alternately arranged with the plurality of conductive parts for electrically separating the plurality of conductive parts,

protrusion parts whose heights are different from that of a surface of the conductive parts whereon the chip is mounted, the protrusion parts being arranged at both ends and a central portion of the array substrate; and

concave parts depressed in a lateral direction with respect to side surfaces of the array substrate, the concave parts being arranged only at the both ends and the central portion where the protrusion parts are arranged.

2. The array substrate according to claim 1 , further comprising a plating layer formed on a surface of the concave parts.

3. The array substrate according to claim 1 , wherein the protrusion parts comprise an inclined surface extending to and having an angle with respect to the surface of the conductive part.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2014
From: NAM, KI MYUNG; PARK, SEUNG HO; JUN, YOUNG CHUL
To: POINT ENGINEERING CO., LTD.
Reel/Frame 034164/0626 →
Priority Claims (2)
KR 10-2013-0129171 · Oct 29, 2013 · national
KR 10-2013-0129287 · Oct 29, 2013 · national
Continuity (1)
Related Publication 20150115310A1 · Apr 30, 2015