IP Library Patent Application 14528415
Patent Application
App. No. 14/528,415

METHOD OF PREVENTING VOLTAGE BREAKDOWN AT A SURFACE OF A SEMICONDUCTOR SUBSTRATE OF A SUPERJUNCTION SEMICONDUCTOR DEVICE

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Quick Facts
Patent No.
US None
App. No.
14/528,415
Abstract

A superjunction semiconductor device is provided having at least one column of a first conductivity type and at least one column of a second conductivity type extending from a first main surface of a semiconductor substrate toward a second main surface of the semiconductor substrate opposed to the first main surface. The at least one column of the second conductivity type has a first sidewall surface proximate the at least one column of the first conductivity type and a second sidewall surface opposed to the first sidewall surface. A termination structure is proximate the second sidewall surface of the at least one column of the second conductivity type. The termination structure includes a layer of dielectric of an effective thickness and consumes about 0% of the surface area of the first main surface. Methods for manufacturing superjunction semiconductor devices and for preventing surface breakdown are also provided.

Claims (2)

1 . A method of preventing voltage breakdown at a surface of a semiconductor substrate of a superjunction semiconductor device, the method comprising placing, proximate an edge portion of the semiconductor substrate, a termination structure comprising a layer of dielectric of an effective thickness, the termination structure consuming about 0% of the surface area of the surface of the semiconductor substrate.

2 . The method of claim 1 , wherein the dielectric is one of a nitride, an oxide, an amorphous silicon, a semi-insulating polycrystalline silicon (SIPOS), a silicon-rich nitride, silicon carbide, glass, ceramic, plastic, and a combination thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2015
From: CHENG, XU
To: ICEMOS TECHNOLOGY LTD.
Reel/Frame 036182/0715 →