IP Library Granted Patent US 9,035,936
Granted Patent B2
US 9,035,936 · App. 14/529,310 · Granted May 19, 2015

Level shifter circuit, scanning circuit, display device and electronic equipment

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,035,936
App. No.
14/529,310
Granted
May 19, 2015
Kind
B2
Abstract

A level shifter circuit, wherein a first and a second transistor circuit are connected serially, a third and a fourth transistor circuit are connected serially; a first input voltage is applied to the second transistor circuit and a second input voltage is applied to the fourth transistor circuit; an input terminal of the first transistor circuit is connected to an output terminal of the third and the fourth transistor circuits, and an input terminal of the third transistor circuit is connected to an output terminal of the first and the second transistor circuits; two transistor circuits of at least one side of two transistor circuits of a first fixed power source side and two transistor circuits of a second fixed power source side are configured of double gate transistors; and the level shifter circuit has a switch element for applying a voltage to a common connection node.

Claims (26)

1. A circuit for driving an organic EL device, comprising:

a first transistor circuit and a second transistor circuit connected serially between a first fixed power source and a second fixed power source, and a third transistor circuit and a fourth transistor circuit connected serially between the first fixed power source and the second fixed power source, the first fixed power source being at a first fixed power source side and the second fixed power source being at a second fixed power source side, such that the first transistor circuit and the third transistor circuit are on the first fixed power source side and the second transistor circuit and the fourth transistor circuit are on the second fixed power source side, wherein

a first input voltage is applied to an input terminal of the second transistor circuit and a second input voltage is applied to an input terminal of the fourth transistor circuit,

an input terminal of the first transistor circuit is connected to an output terminal of the third and the fourth transistor circuits, and an input terminal of the third transistor circuit is connected to an output terminal of the first and the second transistor circuits, and

wherein at least one of the first and third transistor circuits comprises double gate transistors and at least one of the second and fourth transistor circuits comprises double gate transistors; and

a switch element for applying a voltage of a third fixed power source to a common connection node of the double gate transistors at a first side, the first side being one of the first fixed power source side or the second fixed power source side when the transistor circuits at a second side are in an operating state, the second side being the other of the first fixed power source side or the second fixed power source side, and

wherein the voltage of the third fixed power source has a value between voltages of the first fixed power source and the second fixed power source.

2. The circuit according to claim 1 , wherein the voltage between the first fixed power source and the third fixed power source, and the voltage between the third fixed power source and the second fixed power source are voltages within a range of a source-drain withstand voltage of each transistor constituting the first to the fourth transistor circuits.

3. The circuit according to claim 1 , wherein the first input voltage and the second input voltage are reverse phased voltages to each other.

4. The circuit according to claim 1 , wherein the voltage of the third fixed power source is an average value of respective voltages of the first fixed power source and the second fixed power source.

5. The circuit according to claim 1 , wherein the switch element is a transistor having the same conductive type as the transistor circuits of the second side.

6. The circuit according to claim 1 , wherein the first, second, third and fourth transistor circuits respectively comprise double gate transistors.

7. The circuit according to claim 6 , wherein the voltage between the first fixed power source and the third fixed power source, and the voltage between the third fixed power source and the second fixed power source are voltages within a range of a source-drain withstand voltage of each transistor constituting the first to the fourth transistor circuits.

8. The circuit according to claim 6 , wherein the first input voltage and the second input voltage are reverse phased voltages to each other.

9. The circuit according to claim 6 , wherein the voltage of the third fixed power source is an average value of respective voltages of the first fixed power source and the second fixed power source.

10. The circuit according to claim 6 , wherein the switch element is a transistor having the same conductive type as the transistor circuits of the second side.

11. A display device comprising a pixel area unit and the circuit according to claim 1 .

12. The display device according to claim 11 , wherein the voltage between the first fixed power source and the third fixed power source, and the voltage between the third fixed power source and the second fixed power source are voltages within a range of a source-drain withstand voltage of each transistor constituting the first to the fourth transistor circuits.

13. The display device according to claim 11 , wherein the first input voltage and the second input voltage are reverse phased voltages to each other.

14. The display device according to claim 11 , wherein the voltage of the third fixed power source is an average value of respective voltages of the first fixed power source and the second fixed power source.

15. The display device according to claim 11 , wherein the switch element is a transistor having the same conductive type as the transistor circuits of the second side.

16. The display device according to claim 11 , wherein the first, second, third and fourth transistor circuits respectively comprise double gate transistors.

17. The display device according to claim 16 , wherein the voltage between the first fixed power source and the third fixed power source, and the voltage between the third fixed power source and the second fixed power source are voltages within a range of a source-drain withstand voltage of each transistor constituting the first to the fourth transistor circuits.

18. The display device according to claim 16 , wherein the first input voltage and the second input voltage are reverse phased voltages to each other.

19. The display device according to claim 16 , wherein the voltage of the third fixed power source is an average value of respective voltages of the first fixed power source and the second fixed power source.

20. The display device according to claim 16 , wherein the switch element is a transistor having the same conductive type as the transistor circuits of the second side.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036090/0968 →