IP Library Granted Patent US 9,465,675
Granted Patent B2
US 9,465,675 · App. 14/538,846 · Granted Oct 11, 2016

Communication control device, information processing apparatus, parallel computer system, and control method for parallel computer system

Inventors: Hideki Miwa (Kawasaki, JP); Ikuo Miyoshi (Yokohama, JP)
Assignee: FUJITSU LIMITED
G06F9/54G06F9/546G06F11/3404G06F11/3423G06F11/3476
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Quick Facts
Patent No.
US 9,465,675
App. No.
14/538,846
Granted
Oct 11, 2016
Kind
B2
Abstract

An arithmetic processing device executes a program, and gives first sequence information to a first start time when a first process included in the program starts a first interprocess communication. Then, the first start time and the first sequence information are written in a main storage device. When second sequence information given to a second start time when a second process starts a second interprocess communication is newer than the first sequence information, an operational circuit in a communication control device does not carry out an operation using the first start time. On the other hand, when the second sequence information corresponds to the first sequence information, the operational circuit carries out an operation using the first start time and the second start time and outputs the operation result.

Claims (21)

1. A communication control device connected to an arithmetic processing device and a main storage device, the communication control device comprising:

an operational circuit configured not to carry out an operation using a first start time when a first process among a plurality of processes included in a program executed by the arithmetic processing device starts a first interprocess communication, first sequence information being given to the first start time and written in the main storage device by the arithmetic processing device, when second sequence information given to a second start time when a second process among the plurality of processes starts a second interprocess communication is newer than the first sequence information, and configured to carry out an operation using the first start time and the second start time and to output an operation result when the second sequence information corresponds to the first sequence information.

2. The communication control device according to claim 1 , wherein when the first sequence information is newer than the second sequence information and when third sequence information given to a third start time when the second process starts a third interprocess communication corresponds to the first sequence information, the operational circuit does not carry out an operation using the second start time, but carries out an operation using the first start time and the third start time and outputs an operation result.

3. The communication control device according to claim 1 , wherein, the arithmetic processing device executes the first process, and an arithmetic processing device included in an information processing apparatus connected via the communication control device executes the second process.

4. The communication control device according to claim 3 , wherein the first sequence information corresponds to fourth sequence information given to a fourth start time when a fourth process among the plurality of processes starts a fourth interprocess communication, the fourth process being executed by the arithmetic processing device which executes the first process, or the first sequence information is newer than the fourth sequence information.

5. The communication control device according to claim 1 , wherein the arithmetic processing device executes the first process and the second process.

6. An information processing apparatus comprising:

an arithmetic processing device configured to execute a program, and to give first sequence information to a first start time when a first process among a plurality of processes included in the program starts a first interprocess communication;

a main storage device configured to store the first start time and the first sequence information; and

a communication control device configured not to carry out an operation using the first start time when second sequence information given to a second start time when a second process among the plurality of processes starts a second interprocess communication is newer than the first sequence information, and configured to carry out an operation using the first start time and the second start time and to output an operation result when the second sequence information corresponds to the first sequence information.

7. A parallel computer system including a plurality of information processing apparatuses, wherein

at least one information processing apparatus among the plurality of information processing apparatuses includes:

an arithmetic processing device configured to execute a program, and to give first sequence information to a first start time when a first process among a plurality of processes included in the program starts a first interprocess communication;

a main storage device configured to store the first start time and the first sequence information; and

a communication control device configured not to carry out an operation using the first start time when second sequence information given to a second start time when a second process among the plurality of processes starts a second interprocess communication is newer than the first sequence information, and configured to carry out an operation using the first start time and the second start time and to output an operation result when the second sequence information corresponds to the first sequence information.

8. A non-transitory computer-readable recording medium having stored therein a control program for an information processing apparatus including a first arithmetic processing device, a communication control device, and a main storage device, the control program causing a second arithmetic processing device in the communication control device to execute a process comprising:

not carrying out an operation using a first start time when a first process among a plurality of processes included in a program executed by the first arithmetic processing device starts a first interprocess communication, first sequence information being given to the first start time and written in the main storage device by the first arithmetic processing device, when second sequence information given to a second start time when a second process among a plurality of processes starts a second interprocess communication is newer than the first sequence information, but carrying out an operation using the first start time and the second start time and outputting an operation result when the second sequence information corresponds to the first sequence information.

9. A control method for a parallel computer system including a plurality of information processing apparatuses, the control method comprising:

executing a program by at least one information processing apparatus among the plurality of information processing apparatuses:

giving first sequence information to a first start time by the at least one information processing apparatus when a first process among a plurality of processes included in the program starts a first interprocess communication; and

not carrying out an operation using the first start time by the at least one information processing apparatus when second sequence information given to a second start time when a second process among the plurality of processes starts a second interprocess communication is newer than the first sequence information, but carrying out an operation using the first start time and the second start time and outputting an operation result by the at least one information processing apparatus when the second sequence information corresponds to the first sequence information.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2014
From: MIWA, HIDEKI; MIYOSHI, IKUO
To: FUJITSU LIMITED
Reel/Frame 034360/0128 →
Priority Claims (1)
JP 2013-248579 · Nov 29, 2013 · national
Continuity (1)
Related Publication 20150154058A1 · Jun 4, 2015