Method for fabricating resistive random access memory
View Patent ↗A method of fabricating a resistive random access memory (RRAM) device is disclosed. A plurality of word lines extending along a first direction are formed on a substrate with a recess between the word lines. A spacer-type resistance layer and a top electrode layer are formed on a sidewall of each of the word lines. A photoresist stripe pattern extending along a second direction is then formed on the substrate. The first direction is perpendicular to the second direction. An etching process is performed to remove the top electrode layer and the spacer-type resistance layer not covered by the photoresist stripe pattern to form a plurality of top electrodes. A diode is formed on each of the top electrodes.
1. A method of fabricating a resistive random access memory (RRAM) device, comprising:
providing a substrate;
forming a plurality of word lines extending along a first direction on the substrate with recesses between the word lines;
forming a spacer-type resistance layer and a top electrode layer on a sidewall of each of the word lines;
forming a photoresist stripe pattern extending along a second direction on the word lines, wherein the first direction is perpendicular to the second direction;
performing an etching process to remove the top electrode layer not covered by the photoresist stripe pattern to form a plurality of top electrodes; and
forming a diode on each of the top electrodes.
2. The method according to claim 1 , wherein forming the diode on each of the top electrodes comprises the following steps:
forming a tunnel oxide layer on the top electrodes; and
forming a metal layer on the tunnel oxide layer.
3. The method according to claim 2 , wherein the tunnel oxide layer has a thickness of about 6 nm.
4. The method according to claim 2 , wherein the top electrode is TiN and the metal layer is Pt layer.
5. The method according to claim 2 , wherein the top electrode is TiN and the metal layer is Hf layer.
6. The method according to claim 1 , wherein said forming the diode on each of the top electrodes comprises:
forming a dielectric layer to fill the recesses between the word lines;
removing the dielectric layer from odd-column recesses to form first openings exposing the top electrode;
forming a tunnel oxide layer and a first metal layer on the exposed top electrode;
removing the dielectric layer from even-column recesses to form second openings exposing the top electrode; and
forming the tunnel layer and a second meal layer on the exposed top electrode.
7. The method according to claim 6 , wherein the top electrode is TiN, the first metal layer is Pt layer, and the second metal layer is Hf layer.
8. The method according to claim 1 , wherein after forming the diode, the method further comprises:
forming a contact layer in the recesses between the word lines; and
forming bit lines extending along the second direction on the contact layer.
9. The method according to claim 8 , wherein the contact layer comprises tungsten.
10. The method according to claim 1 further comprises forming a hard mask layer on each of the plurality of word lines.