IP Library Granted Patent US 9,743,474
Granted Patent B2
US 9,743,474 · App. 14/541,470 · Granted Aug 22, 2017

Method and system for lighting interface messaging with reduced power consumption

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,743,474
App. No.
14/541,470
Granted
Aug 22, 2017
Kind
B2
Abstract

Provided is a system for reducing power consumption in digitally addressable lighting interfaces (DALI), the system including a processor having at least one pin, a transistor coupled to the processor and a resistive network coupled to the processor and the resistive network.

Claims (39)

1. A system for reducing power consumption in a lighting interface, the system comprising:

a processor having a plurality of pins including at least one digital pin;

a transistor having a gate coupled to the processor; and

a resistive network coupled to the processor and the transistor,

wherein the processor controls the at least one digital pin of the plurality of pins, being an output during a normal operation, and being an input during a standby operation wherein the resistive network is adjusted to increase impedance at the gate and lower the power consumption during the standby operation.

2. The system of claim 1 , wherein the resistive network comprises:

a first resistor electrically connected between a power supply and the gate of the transistor; and

a second resistor configured to be connected to the processor.

3. The system of claim 2 , wherein the lighting interface is a digital addressable lighting interface (DALI).

4. The system of claim 3 , wherein the transistor is configured to transmit the DALI message received at the gate to the processor by opening and closing in response to the signal at the gate to allow the processor to receive the digital DALI message.

5. The system of claim 4 , wherein at least one digital pin configured as the output pin is driven high, wherein the processor is configured to switch the second resistor out, to allow increased current to flow from the power supply into the gate of the transistor.

6. The system of claim 4 , wherein the at least one digital pin configured as the input pin is driven to increase an impedance of the input pin, thereby electrically removing the second resistor from the resistive network.

7. The system of claim 4 , wherein the first voltage signal is 0-5 volts.

8. The system of claim 3 , wherein the transistor is configured to transmit the DALI message that it sees at its gate to the processor by opening and closing in response to the signal at the gate to allow the processor to receive the digital DALI message.

9. A method for reducing power consumption in a lighting interface, the method comprising:

configuring a processor having a plurality of pins including at least one digital pin, to be in a normal mode to send and receive lighting messages responsive a first voltage signal from a transistor coupled to the processor, thereby placing a lighting interface in a normal operating mode and turning on a luminaire; and

configuring the processor to be in a standby mode with reduced power consumption to send and receive lighting messages, responsive to a second voltage signal from the transistor indicating, thereby placing the lighting interface into a reduced power mode and turning off the luminaire wherein the processor adjusts a resistive network connected with the at least one digital pin, to increase impedance at the transistor to lower the power consumption during the standby mode.

10. The method of claim 9 , wherein the lighting interface is a digital addressable lighting interface (DALI).

11. The method of claim 10 , wherein configuring the processor to be in the normal mode, comprises:

opening the transistor so that a first voltage is sent to the processor; and

setting the at least one digital pin as an output pin wherein a first resistor and a second resistor are connected, with the at least digital pin being connected with the second resistor, thereby increasing a current flow to the transistor.

12. The method of claim 10 , wherein configuring the processor to be in the standby mode, comprises:

opening the transistor so that a first voltage is sent to the processor; and

setting the at least one digital pin as an input pin to increase the impedance of a second resistor to effectively remove the second resistor from operation with a first resistor.

13. The method of claim 12 , wherein the first voltage signal is 0-5 volts.

14. The method of claim 12 , further comprising, responsive to receiving a DALI message in the processor, setting via the processor the at least one digital pin as an output pin and switching the second resistor out thereby increasing a current flow to the transistor.

15. A system for reducing power consumption in a digital addressable lighting interface (DALI), the system comprising:

a light emitting diode (LED) driver;

a DALI controller communicatively coupled to the LED driver; and

a luminaire coupled to the LED driver,

wherein the LED driver comprises a plurality of pins including at least one digital pin of the plurality of pins which is configured to be an output during a normal operation, and to be an input during a standby operation, wherein a resistive network including a first resistor and a second resistor that are connected, with the at least one digital pin being connected with the second resistor, wherein during standby operation, the second resistor is switched out to increase impedance at the gate and lower the power consumption.

16. The system of claim 15 , wherein the LED driver further comprises:

a transistor coupled to the processor;

a first resistor connected to the transistor; and

a second resistor configured to be connected to the processor.

17. The system of claim 16 , wherein the processor is configured to be in a normal mode to send and receive lighting messages responsive a first voltage signal from the transistor coupled to the processor, thereby placing the DALI in a normal operating mode and turning on the luminaire.

18. The system of claim 17 , wherein the at least one digital pin is configured as an output pin and driven high to the transistor thereby configuring the first resistor to operate in connection with the second resistor in the resistive network.

19. The system of claim 17 , wherein the at least one digital pin is configured an input pin thereby electrically removing the second resistor from the resistive network.

20. The system of claim 16 , wherein the processor is configured to be in a standby mode with reduced power consumption to send and receive lighting messages, responsive to a second voltage signal from the transistor indicating, thereby placing the lighting interface into a reduced power mode and turning off the luminaire.

Assignments (11)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER PREVIOUSLY RECORDED AT REEL: 059034 FRAME: 0469. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jan 25, 2024
From: HUBBELL LIGHTING, INC.; LITECONTROL CORPORATION; CURRENT LIGHTING SOLUTIONS, LLC; DAINTREE NETWORKS INC.; FORUM, INC.
To: ATLANTIC PARK STRATEGIC CAPITAL FUND, L.P., AS COLLATERAL AGENT
Reel/Frame 066372/0590 →
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 10841994 TO PATENT NUMBER 11570872 PREVIOUSLY RECORDED ON REEL 058982 FRAME 0844. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Jan 19, 2024
From: HUBBELL LIGHTING, INC.; LITECONTROL CORPORATION; CURRENT LIGHTING SOLUTIONS, LLC; DAINTREE NETWORKS INC.; FORUM, INC.
To: ALLY BANK, AS COLLATERAL AGENT
Reel/Frame 066355/0455 →
RELEASE OF SECURITY INTEREST Recorded Mar 17, 2022
From: ALLY BANK
To: CURRENT LIGHTING SOLUTIONS, LLC; FORUM, INC.
Reel/Frame 059392/0079 →
RELEASE OF SECURITY INTEREST Recorded Mar 17, 2022
From: ALLY BANK
To: CURRENT LIGHTING SOLUTIONS, LLC; FORUM, INC.
Reel/Frame 059432/0592 →
SECURITY INTEREST Recorded Feb 11, 2022
From: HUBBELL LIGHTING, INC.; LITECONTROL CORPORATION; CURRENT LIGHTING SOLUTIONS, LLC; DAINTREE NETWORKS INC.; FORUM, INC.
To: ATLANTIC PARK STRATEGIC CAPITAL FUND, L.P., AS COLLATERAL AGENT
Reel/Frame 059034/0469 →
SECURITY AGREEMENT Recorded Feb 2, 2022
From: HUBBELL LIGHTING, INC.; LITECONTROL CORPORATION; CURRENT LIGHTING SOLUTIONS, LLC; DAINTREE NEETWORKS INC.; FORUM, INC.
To: ALLY BANK, AS COLLATERAL AGENT
Reel/Frame 058982/0844 →
SECURITY AGREEMENT Recorded May 27, 2020
From: CURRENT LIGHTING SOLUTIONS, LLC
To: ALLY BANK, AS COLLATERAL AGENT
Reel/Frame 052763/0643 →
SECURITY AGREEMENT Recorded Jun 28, 2019
From: CURRENT LIGHTING SOLUTIONS, LLC
To: ALLY BANK, AS COLLATERAL AGENT
Reel/Frame 049672/0294 →
SECURITY AGREEMENT Recorded Jun 28, 2019
From: CURRENT LIGHTING SOLUTIONS, LLC
To: ALLY BANK, AS COLLATERAL AGENT
Reel/Frame 051047/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2019
From: GENERAL ELECTRIC COMPANY
To: CURRENT LIGHTING SOLUTIONS, LLC F/K/A GE LIGHTING SOLUTIONS, LLC
Reel/Frame 048791/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2014
From: SCHEIDEGGER, NINA ROSE; BURK, JESSICA LYNN; ESSIAMBRE, BENOIT; YAO, GANG
To: GENERAL ELECTRIC COMPANY
Reel/Frame 034506/0200 →