Electronic device and electronic device manufacturing method
View Patent ↗An electronic device including: a substrate; a bank formed above the substrate; a semiconductor layer formed within an aperture surrounded by the bank; and electrodes electrically connected to the semiconductor layer. An outline of the aperture in plan view includes a first straight edge, a second straight edge continuous with one end of the first edge via a first connector, and a straight third edge continuous with the other end of the first edge via a second connector. The area of a first connector region differs from the area of a second connector region, the first connector region being defined by a first imaginary straight line along the first edge, a second imaginary straight line along the second edge, and the first connector, and the second connector region being defined by a third imaginary straight line along the third edge, the first imaginary straight line, and the second connector.
1. An electronic device comprising:
a substrate;
a bank formed above the substrate;
a semiconductor layer formed within an aperture surrounded by the bank; and
a pair of electrodes electrically connected to the semiconductor layer, wherein
an outline of the aperture in plan view includes a first edge that is a straight line segment, a second edge that is a straight line segment continuous with one end of the first edge via a first connector, and a third edge that is a straight line segment continuous with the other end of the first edge via a second connector, and
the area of a first connector region differs from the area of a second connector region, the first connector region being defined by a first imaginary straight line extending along the first edge, a second imaginary straight line extending along the second edge, and the first connector, and the second connector region being defined by a third imaginary straight line extending along the third edge, the first imaginary straight line, and the second connector.
2. The electronic device of claim 1 , wherein
the first connector is a straight line segment.
3. The electronic device of claim 1 , wherein
the first connector is a curved line segment.
4. The electronic device of claim 2 , wherein
the second connector is a straight line segment.
5. The electronic device of claim 2 , wherein
the second connector is a curved line segment.
6. The electronic device of claim 1 , wherein
in plan view, a portion of the semiconductor layer between the pair of electrodes is separated from the outline.
7. The electronic device of claim 1 , wherein
a first intersection point, being an intersection of the first imaginary straight line and the second imaginary straight line, is located in the first connector or outside the outline,
a second intersection point, being an intersection of the third imaginary straight line and the first imaginary straight line, is located outside the outline, and
the area of the second connector region is greater than the area of the first connector region.
8. The electronic device of claim 7 , wherein
in plan view, a portion of the semiconductor layer between the pair of electrodes is separated from the first connector.
9. The electronic device of claim 7 , wherein
in plan view, the pair of electrodes do not overlap the first connector.
10. The electronic device of claim 7 , wherein
in plan view, at least one of the pair of electrodes overlaps the first connector.
11. The electronic device of claim 1 , wherein
the outline of the aperture in plan view additionally includes a fourth edge that is a straight line segment continuous with one end of the third edge via a third connector and with one end of the second edge via a fourth connector, said one end of the third edge being not connected to the second connector, and said one end of the second edge being not connected to the first connector,
the area of a third connector region differs from the area of the second connector region, the third connector region being defined by a fourth imaginary straight line extending along the fourth edge, the third imaginary straight line, and the third connector, and
the area of a fourth connector region differs from the area of the third connector region and the area of the first connector region, the fourth connector region being defined by the fourth imaginary straight line, the second imaginary straight line, and the fourth connector.
12. The electronic device of claim 1 , wherein
the semiconductor layer contains a material that performs photoelectric conversion.
13. The electronic device of claim 12 , wherein
the pair of electrodes are formed above and below the semiconductor layer, with the semiconductor layer interposed therebetween, and
the semiconductor layer contains an organic or inorganic light-emitting material.
14. The electronic device of claim 1 , further comprising:
a gate electrode formed between the substrate and the semiconductor layer, wherein
the pair of electrodes are formed along a main surface of the substrate, with an interval therebetween, and a portion of the semiconductor layer is formed between the pair of electrodes, the pair of electrodes being composed of a source electrode and a drain electrode.
15. An electronic device manufacturing method comprising:
preparing a substrate;
forming a bank above the substrate;
applying ink within an aperture surrounded by the bank, thereby forming a semiconductor layer, the ink containing a semiconductor material; and
forming a pair of electrodes electrically connected to the semiconductor layer, wherein
an outline of the aperture in plan view includes a first edge that is a straight line segment, a second edge that is a straight line segment continuous with one end of the first edge via a first connector, and a third edge that is a straight line segment continuous with the other end of the first edge via a second connector, and
the area of a first connector region differs from the area of a second connector region, the first connector region being defined by a first imaginary straight line extending along the first edge, a second imaginary straight line extending along the second edge, and the first connector, and the second connector region being defined by a third imaginary straight line extending along the third edge, the first imaginary straight line, and the second connector.
16. The electronic device manufacturing method of claim 15 , wherein
the ink contains an organic or inorganic light-emitting material, and
the pair of electrodes are formed above the substrate and above and below the semiconductor layer, with the semiconductor layer interposed between the pair of electrodes.
17. The electronic device manufacturing method of claim 15 , further comprising:
forming another electrode on the substrate; and
forming an insulation layer between the semiconductor layer and the pair of electrodes, wherein
the pair of electrodes are formed along a main surface of the substrate, with an interval therebetween, and a portion of the semiconductor layer is formed between the pair of electrodes.