IP Library Granted Patent US 9,337,376
Granted Patent B2
US 9,337,376 · App. 14/551,707 · Granted May 10, 2016

Method and apparatus providing multi-step deposition of thin film layer

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Quick Facts
Patent No.
US 9,337,376
App. No.
14/551,707
Granted
May 10, 2016
Kind
B2
Abstract

A multi-stage method and apparatus for vaporizing and depositing a tellurium containing semiconductor material on a substrate.

Claims (34)

1. A method of multi-stage vapor deposition of a semiconductor material, the method comprising:

flowing a first solid semiconductor material into a first heated chamber to produce a first semiconductor material vapor, wherein the first heated chamber is heated to a temperature of less than or equal to 1050° C.;

depositing the first semiconductor material vapor onto a substrate to form a first semiconductor material layer;

flowing a second solid semiconductor material into a second heated chamber to produce a second semiconductor material vapor,

wherein the second heated chamber is heated to a temperature of less than or equal to 1050° C.; and

depositing the second semiconductor material vapor as a second semiconductor material layer over the first semiconductor material layer.

2. A method as in claim 1 , wherein the first and second solid semiconductor materials are the same material.

3. The method as in claim 1 , wherein the first and second solid semiconductor materials are selected from the group consisting of binary tellurium containing semiconductor materials.

4. The method as in claim 1 , wherein the first and second solid semiconductor materials are selected from the group consisting of ternary tellurium containing semiconductor materials.

5. The method as in claim 1 , wherein the deposited first and second semiconductor material layers form and integrated material layer.

6. The method as in claim 5 , wherein first and second material layers form an absorber layer of a photovoltaic device.

7. The method as in claim 1 , wherein the first and second solid semiconductor materials comprise CdTe.

8. The method as in claim 5 , wherein the integrated material layer has an impurity concentration of less than or equal to about 1 e18/cm 3 .

9. The method as in claim 5 , wherein the integrated material layer has an impurity concentration within the range of about 1 e16/cm 3 to about 1 e18/cm 3 .

10. The method as in claim 9 , wherein the impurity comprises silicon.

11. The method as in claim 1 , wherein the first and second heated chambers are within a common deposition housing, the method further comprising transporting substrates through the common deposition housing to sequentially receive vapor generated by the first and second heated chambers.

12. The method as in claim 1 , wherein the first and second heated chambers are each within a respective deposition housing, the method further comprising transporting substrates sequentially through the respective deposition housings.

13. A method of vapor deposition of a semiconductor material, the method comprising:

flowing a first solid semiconductor material into a first heated chamber to produce a first semiconductor material vapor;

depositing the first semiconductor material vapor onto a substrate to form a first semiconductor material layer;

flowing a second solid semiconductor material into a second heated chamber to produce a second semiconductor material vapor,

depositing the second semiconductor material vapor as a second semiconductor material layer over the first semiconductor material layer;

wherein the first and second heated chambers are surrounded by respective first and second shrouds which respectively receive semiconductor material vapor from the heated chambers and direct the first and second semiconductor materials vapor for deposition and wherein the first and second heated chambers and respective shrouds are provided in respective deposition chambers.

14. A method of multi-stage vapor deposition of a tellurium containing semiconductor material, the method comprising:

flowing a plurality of solid tellurium containing materials respectively into each of a plurality of heated chambers which respectively produce a tellurium containing material vapor;

directing the respective vapor from each of the plurality of heated chambers sequentially onto a substrate to form a plurality of sequentially deposited material layers;

controlling the temperature of each of the heated chambers to be less than or equal to 1050° C. such that concentration of an impurity in the deposited material is less than or equal to about 1 e18/cm 3 ; and

wherein at least one of the heated chambers produces a tellurium containing material vapor which further includes a dopant material, and wherein the material composition of the heated chambers includes the dopant material as a component thereof whereby the controlled temperature of the heated chambers reduces the amount of deposited dopant originating from the heated chamber material composition.

15. A method of multi-stage depositing of a tellurium containing material, the method comprising:

flowing a first solid semiconductor material into a first heated chamber to produce a first semiconductor material vapor;

depositing the first semiconductor material vapor onto a substrate to form a first semiconductor material layer;

flowing a second solid semiconductor material into a second heated chamber to produce a second semiconductor material vapor,

depositing the second semiconductor material vapor as a second semiconductor material layer over the first semiconductor material layer;

wherein at least one of the first and second semiconductor materials contains a dopant which is also contained in one of the first and second semiconductor material vapors, and wherein at least one of the first and second heated chambers has a material composition which also contains the dopant, the method further comprising limiting the heating of the first and second heated chambers to values which prevent the dopant in the heated chamber material composition from being vaporized and deposited.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Feb 13, 2026
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 074858/0364 →
SECURITY INTEREST Recorded Jul 10, 2023
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 064237/0462 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 15, 2021
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 058132/0566 →
PATENT SECURITY AGREEMENT Recorded Jul 12, 2017
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 043177/0581 →