WIRING BOARD AND METHOD FOR MOUNTING SEMICONDUCTOR ELEMENT ON WIRING BOARD
A wiring board of the present invention includes an insulating board having a mounting portion on an upper surface to mount a semiconductor element, and semiconductor element connection pads formed on the mounting portion, on which at least three first dummy pads arranged on a center portion of the mounting portion, and at least three second dummy pads arranged on a peripheral portion of the mounting portion, are formed, and a dummy solder bump is formed on each of the first dummy pad and the second dummy pad.
1 . A wiring board comprising:
an insulating board having a mounting portion on an upper surface to mount a semiconductor element;
a plurality of semiconductor element connection pads formed on the mounting portion, wherein
at least three first dummy pads arranged on a center portion of the mounting portion so as to surround the center portion, and at least three second dummy pads arranged on a peripheral portion of the mounting portion so as to surround the center portion, are formed,
a dummy solder bump is formed on each of the first and second dummy pads, and
a height of the dummy solder bump is greater than a total of a height of an electrode terminal formed on the semiconductor element to be mounted and a height of a solder bump formed on the electrode terminal.
2 . The wiring board according to claim 1 , wherein
the insulating board has a thermal expansion coefficient of 10 ppm/° C. to 20 ppm/° C. with respect to a direction along a connection surface with the semiconductor element.
3 . The wiring board according to claim 1 , wherein
the semiconductor element to be mounted has a thermal expansion coefficient of 3 ppm/° C. to 4 ppm/° C. with respect to a direction along a connection surface with the wiring board.
4 . The wiring board according to claim 1 , wherein
the semiconductor element connection pads are formed at an arrangement pitch smaller by 0.1 μm to 1 μm than an arrangement pitch of the electrode terminals provided on the semiconductor element corresponding to the semiconductor element connection pads before being heated to a solder melting temperature.
5 . A method for mounting a semiconductor element comprising steps of:
preparing the wiring board according to claim 1 ;
preparing the semiconductor element in such a manner that on a lower surface of a semiconductor board having a size corresponding to a mounting portion of the wiring board, a first electrode terminal positioned on a center of the lower surface is formed and second electrode terminals are formed so as to correspond to an arrangement of semiconductor element connection pads of the mounting portion, a solder bump is formed on each of the first and second electrode terminals so that a total of a height of the electrode terminal and a height of the solder bump is smaller than a height of a dummy solder bump formed on a first dummy pad of the mounting portion, and a pitch of the second electrode terminals is set to substantially coincide with a pitch of the semiconductor element connection pads of the wiring board at a melting temperature of the solder bump and the dummy solder bump of the wiring board;
mounting the semiconductor element on the mounting portion in such a manner that the solder bump formed on the first electrode terminal is inserted into a space surrounded by the dummy solder bumps formed on the first dummy pads of the wiring board, and a peripheral portion of a lower surface of the semiconductor element abut on the dummy solder bumps formed on the second dummy pads of the wiring board; and
connecting the first electrode terminal to the first dummy pads with solders of the solder bump and the dummy solder bump, and connecting the second electrode terminal to the semiconductor element connection pad with the solder of the solder bump by heating the wiring board and the semiconductor element to the melting temperature of the solder bump and the dummy solder bump.
6 . The mounting method according to claim 5 , wherein
an insulating board of the wiring board has a thermal expansion coefficient of 10 ppm/° C. to 20 ppm/° C. with respect to a direction along a connection surface with the semiconductor element.
7 . The mounting method according to claim 5 , wherein
the semiconductor element to be mounted has a thermal expansion coefficient of 3 ppm/° C. to 4 ppm/° C. with respect to a direction along a connection surface with the wiring board.
8 . The mounting method according to claim 5 , wherein
the semiconductor element connection pads are formed at an arrangement pitch smaller by 0.1 μm to 1 μm than an arrangement pitch of the second electrode terminals before being heated to a solder melting temperature.