Variable resistance memory device including phase change area defined by spacers

1. A variable resistance memory device, comprising:

a multi-layered insulating layer including a plurality of holes formed on a semiconductor substrate;

a lower electrode formed in a bottom of each of the holes;

a first spacer formed on the lower electrode and a sidewall of each of the holes;

a second spacer formed on an upper sidewall of the first spacer to a predetermined height;

a third spacer formed on a lower sidewall of the first spacer below the second spacer;

a variable resistance part formed on the lower electrode and having a height lower than a height of a top of each hole; and

an upper electrode formed on the variable resistance part to be buried in each hole,

wherein a resistivity of the variable resistance part is changed according to a phase-change of the variable resistance part.

2. The variable resistance memory device of claim 1 , wherein the multi-layered insulating layer includes:

a first insulating layer formed on the lower electrode and formed of nitride;

a second insulating layer formed on the first insulating layer and formed of oxide;

a third insulating layer fainted on the second insulating layer and formed of the nitride; and

a fourth insulating layer formed on the third insulating layer and formed of the oxide.

3. The variable resistance memory device of claim 2 , wherein the second spacer is formed through selectively oxidizing the first spacer.

4. The variable resistance memory device of claim 3 , wherein the first spacer, the second spacer, and the third spacer are formed of materials having different etch selectivities from each other.

5. The variable resistance memory device of claim 4 , wherein a height of the variable resistance part is higher than that of the third spacer.

6. A variable resistance memory device, comprising:

a insulating layer including a hole formed on a semiconductor substrate;

a lower electrode formed in the hole, the lower electrode having a height lower than that of the hole;

a first spacer formed on the lower electrode and a whole sidewall of the hole;

a second spacer formed on an upper sidewall of the first spacer to a predetermined height;

a third spacer formed on a lower sidewall of the first spacer below the second spacer, an upper surface of the third spacer being contacted with a lower surface of the second spacer and the third spacer including an etching selectivity being different from that of the second spacer;

a variable resistance part formed on the lower electrode in the hole; and

an upper electrode formed on the variable resistance part in the hole.

7. The variable resistance memory device of claim 6 , wherein the insulating layer includes:

a first insulating layer formed on the lower electrode and formed of a nitride material;

a second insulating layer formed on the first insulating layer and formed of an oxide material; and

a third insulating layer formed on the second insulating layer and formed of the nitride material.

8. The variable resistance memory device of claim 6 , wherein the first spacer includes a poly silicon material.

9. The variable resistance memory device of claim 8 , wherein the second spacer includes a silicon oxide material obtained by oxidizing the first spacer.

10. The variable resistance memory device of claim 9 , wherein the third spacer includes a nitride material.