IP Library Granted Patent US 9,123,618
Granted Patent B2
US 9,123,618 · App. 14/557,021 · Granted Sep 1, 2015

Method for producing image pickup apparatus, and method for producing semiconductor apparatus

Inventors: Kazuhiro Yoshida (Nagano, JP); Noriyuki Fujimori (Suwa, JP); Takatoshi Igarashi (Ina, JP)
Assignee: OLYMPUS CORPORATION
H01L27/14687H01L21/56H01L21/76898H01L21/78H01L22/10H01L25/042H01L27/14618H01L2924/0002
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Quick Facts
Patent No.
US 9,123,618
App. No.
14/557,021
Filed
Dec 1, 2014
Granted
Sep 1, 2015
Kind
B2
Art Unit
2816
USPC
438/14
Abstract

A method for producing an image pickup apparatus includes: a process of fabricating a plurality of image pickup chips by cutting an image pickup chip substrate where light receiving sections and electrode pads are formed; a process of fabricating a joined wafer by bonding the image pickup chips to a glass wafer; a process of filling a gap between the plurality of image pickup chips with a sealing member; a process of machining the joined wafer to reduce a thickness; a process of forming through-hole vias; a process of forming an insulating layer that covers the image pickup chips; a process of forming through-hole interconnections; a process of forming external connection electrodes, each of which is connected to each of the through-hole interconnections; and a process of cutting the joined wafer.

Claims (30)

1. A method for producing an image pickup apparatus comprising:

a process of fabricating a plurality of image pickup chips by cutting an image pickup chip substrate where a plurality of light receiving sections are formed on a first main face and electrode pads are formed around each of the light receiving sections;

a process of fabricating a joined wafer by bonding the first main face of each of the image pickup chips to a transparent support substrate via a transparent adhesive layer;

a process of filling a gap between the plurality of image pickup chips bonded to the joined wafer with a sealing member;

a process of machining the joined wafer from a second main face side to reduce a thickness;

a process of forming an etching mask on the second main face;

a process of forming through-hole vias in the image pickup chips by using the etching mask;

a process of stripping the etching mask;

a process of forming an insulating layer that covers the second main face of the image pickup chips, a surface of the sealing member, and a wall face of the through-hole vias;

a process of forming through-hole interconnections, each of which is connected to each of the electrode pads via each of the through-hole vias;

a process of forming external connection electrodes, each of which is connected to each of the through-hole interconnections on the second main face; and

a process of cutting the joined wafer.

2. The method for producing an image pickup apparatus according to claim 1 , wherein image pickup chips determined as non-defective products by an inspection are bonded to the support substrate.

3. The method for producing an image pickup apparatus according to claim 2 , wherein the image pickup chips are bonded to the support substrate in a state in which a first alignment mark formed on the support substrate and a second alignment mark formed on the first main face of the image pickup chips are aligned with each other.

4. A method for producing a semiconductor apparatus comprising:

a process of fabricating a plurality of semiconductor chips by cutting a semiconductor chip substrate where a plurality of semiconductor circuit sections are formed on a first main face and electrode pads are formed around each of the semiconductor circuit sections;

a process of fabricating a joined wafer by bonding the first main face of each of the semiconductor chips to a support substrate via an adhesive layer;

a process of filling a gap between the plurality of semiconductor chips bonded to the joined wafer with a sealing member;

a process of machining the joined wafer from a second main face side to reduce a thickness;

a process of forming an etching mask on the second main face;

a process of forming through-hole vias in the semiconductor chips by using the etching mask;

a process of stripping the etching mask;

a process of forming an insulating layer that covers the second main face of the semiconductor chips, a surface of the sealing member, and a wall face of the through-hole vias;

a process of forming through-hole interconnections, each of which is connected to each of the electrode pads via each of the through-hole vias;

a process of forming external connection electrodes, each of which is connected to each of the through-hole interconnections on the second main face; and

a process of cutting the joined wafer.

5. The method for producing a semiconductor apparatus according to claim 4 , wherein the semiconductor chips determined as non-defective products by an inspection are bonded to the support substrate.

6. The method for producing a semiconductor apparatus according to claim 5 , including a process of forming a cover layer that covers the sealing member exposed on the second main face before the process of forming the etching mask.

7. The method for producing a semiconductor apparatus according to claim 6 , wherein in the process of stripping the etching mask, the etching mask in a region covering the sealing member is not stripped.

8. The method for producing a semiconductor apparatus according to claim 7 , wherein the support substrate and the adhesive layer are transparent.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 27, 2016
From: OLYMPUS CORPORATION
To: OLYMPUS CORPORATION
Reel/Frame 039344/0502 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2014
From: YOSHIDA, KAZUHIRO; FUJIMORI, NORIYUKI; IGARASHI, TAKATOSHI
To: OLYMPUS CORPORATION
Reel/Frame 034290/0952 →
Priority Claims (1)
JP 2012-123225 · May 30, 2012 · national
Continuity (2)
Continuation PCTJP2013060345 · Apr 4, 2013
Related Publication 20150087086A1 · Mar 26, 2015