Electronic device
View Patent ↗An electronic device includes a first magnetic layer pinned in its magnetization direction, a third magnetic layer pinned in its magnetization direction, a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and changeable in its magnetization direction, a barrier layer interposed between the first magnetic layer and the second magnetic layer, and a dielectric layer interposed between the second magnetic layer and the third magnetic layer, wherein the first magnetic layer has a width 1.5 to 5 times wider than a width of the second magnetic layer.
1. An electronic device comprising a semiconductor memory unit that comprises:
a first magnetic layer with a pinned magnetization direction;
a third magnetic layer with a pinned magnetization direction;
a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and with an unpinned magnetization direction;
a barrier layer interposed between the first magnetic layer and the second magnetic layer; and
a dielectric layer interposed between the second magnetic layer and the third magnetic layer,
wherein the width of the first magnetic layer is 1.5 to 5 times wider than the width of the second magnetic layer such that the second magnetic layer is protected from stray magnetic fields in a horizontal direction parallel to upper surfaces of the first to third magnetic layers.
2. The electronic device according to claim 1 , wherein the width of the third magnetic layer is 1.5 to 5 times wider than the width of the second magnetic layer such that the second magnetic layer is protected from the stray magnetic fields in the horizontal direction parallel to the upper surfaces of the first to third magnetic layers.
3. The electronic device according to claim 1 , wherein the first to third magnetic layers are magnetized in a vertical direction perpendicular to the upper surfaces of the first to third magnetic layers.
4. The electronic device according to claim 1 , wherein the first to third magnetic layers are magnetized in the horizontal direction.
5. The electronic device according to claim 1 , wherein the barrier layer comprises dielectric material or nonmagnetic conductive material.
6. The electronic device according to claim 1 , wherein the third magnetic layer comprises a bottom magnetic layer, a top magnetic layer and a nonmagnetic layer which is interposed between the bottom magnetic layer and the top magnetic layer.
7. The electronic device according to claim 3 , wherein the width of the first magnetic layer is about 2.5 times wider than the width of the second magnetic layer such that a stray magnetic field in the vertical direction is approximately 0.
8. The electronic device according to claim 1 , wherein the semiconductor memory unit further comprises:
a first conductive layer coupled to the first magnetic layer; and
a second conductive layer coupled to the third magnetic layer.
9. The electronic device according to claim 1 , further comprising a processor which includes:
a core unit configured to perform, based on a command inputted from an outside of the processor, an operation corresponding to the command, by using data;
a cache memory unit configured to store data for performing the operation, data corresponding to a result of performing the operation, or an address of data for which the operation is performed; and
a bus interface connected between the core unit and the cache memory unit, and configured to transmit data between the core unit and the cache memory unit,
wherein the semiconductor memory unit that is part of the cache memory unit in the processor.
10. An electronic device comprising a semiconductor memory unit that comprises:
a first magnetic layer with a pinned magnetization direction;
a third magnetic layer with an unpinned magnetization direction;
a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and with a pinned magnetization direction;
a barrier layer interposed between the first magnetic layer and the second magnetic layer; and
a dielectric layer interposed between the second magnetic layer and the third magnetic layer,
wherein the width of the second magnetic layer is 1.5 to 5 times wider than the width of the third magnetic layer such that the third magnetic layer is protected from stray magnetic fields in a horizontal direction parallel to upper surfaces of the first to third magnetic layers.
11. The electronic device according to claim 10 , wherein the width of the first magnetic layer is 1.5 to 5 times wider than the width of the third magnetic layer such that the third magnetic layer is protected from the stray magnetic fields in the horizontal direction parallel to the upper surfaces of the first to third magnetic layers.
12. The electronic device according to claim 10 , wherein the first to third magnetic layers are magnetized in a vertical direction, which is perpendicular to upper surfaces of the first to third magnetic layers.
13. The electronic device according to claim 10 , wherein the first to third magnetic layers are magnetized in the horizontal direction.
14. The electronic device according to claim 10 , wherein the barrier layer comprises nonmagnetic conductive material.
15. The electronic device according to claim 12 , wherein the width of the second magnetic layer is about 2.5 times wider than the width of the third magnetic layer such that a stray magnetic field in the vertical direction is approximately 0.
16. The electronic device according to claim 10 , wherein the semiconductor memory unit further comprises:
a first conductive layer coupled to the first magnetic layer; and
a second conductive layer coupled to the third magnetic layer.
17. An electronic device comprising:
a first magnetic layer with a pinned magnetization direction;
a second magnetic layer with an unpinned magnetization direction; and
a third magnetic layer with a pinned magnetization direction;
wherein the first, the second, and the third magnetic layers form a stacked structure, and
wherein at least one of the first and the third magnetic layers has a width 1.5 to 5 times wider than the width of the second magnetic layer such that the second magnetic layer is protected from stray magnetic fields in a horizontal direction parallel to upper surfaces of the first to third magnetic layers.
18. The electronic device of claim 17 ,
wherein the second magnetic layer is provided between the first and the third magnetic layers.
19. The electronic device of claim 17 ,
wherein the first magnetic layer is provided between the second and the third magnetic layers.
20. The electronic device of claim 17 ,
wherein the third magnetic layer is provided between the first and the second magnetic layers.