Electronic device
There is disclosed an electronic device comprising a semiconductor memory unit capable of reducing the switching current of a variable resistance element that switches between different resistance states. In an implementation, an electronic device includes a semiconductor memory unit that includes a variable resistance element comprising a first magnetic layer configured to have a magnetization direction pinned, a second magnetic layer configured to have a magnetization direction not pinned, and a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer, wherein the variable resistance element comprises plane shapes having a plurality of edges, and the number of angled edges is larger than the number of rounded edges as a damping constant of the second magnetic layer increase.
1. An electronic device comprising a semiconductor memory unit that includes:
a variable resistance element comprising a first magnetic layer with a pinned magnetization direction, a second magnetic layer with a non-pinned magnetization direction, and a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer,
wherein, the variable resistance element has more angled edges than rounded edges such that a switching current is reduced as a damping constant of the second magnetic layer increases, and
wherein a shape of the variable resistance element is changed according to a change of the damping constant value,
wherein the variable resistance element includes only the rounded edges or only angled edges.
2. The electronic device according to claim 1 , wherein, the variable resistance element is symmetrical with respect to a center line of the variable resistance element.
3. The electronic device according to claim 1 , wherein, the variable resistance element is asymmetrical with respect to a center line of the variable resistance element.
4. The electronic device according to claim 1 , further comprising a processor which includes:
a core unit configured to perform, based on a command inputted from an outside of the processor, an operation corresponding to the command, by using data;
a cache memory unit configured to store data for performing the operation, data corresponding to a result of performing the operation, or an address of data for which the operation is performed; and
a bus interface connected between the core unit and the cache memory unit, and configured to transmit data between the core unit and the cache memory unit,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the cache memory unit in the processor.
5. The electronic device according to claim 1 , further comprising a processing system which includes:
a processor configured to decode a command received by the processor and control an operation for information based on a result of decoding the command;
an auxiliary memory device configured to store a program for decoding the command and the information;
a main memory device configured to call and store the program and the information from the auxiliary memory device such that the processor performs the operation using the program and the information when executing the program; and
an interface device configured to perform communication between at least one of the processor, the auxiliary memory device and the main memory device and the outside,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the auxiliary memory device or the main memory device in the processing system.
6. The electronic device according to claim 1 , further comprising a data storage system which includes:
a storage device configured to store data and conserve stored data regardless of power supply;
a controller configured to control input and output of data to and from the storage device according to a command inputted form an outside;
a temporary storage device configured to temporarily store data exchanged between the storage device and the outside; and
an interface configured to perform communication between at least one of the storage device, the controller and the temporary storage device and the outside,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the storage device or the temporary storage device in the data storage system.
7. An electronic device comprising a semiconductor memory unit that includes:
a variable resistance element having a plurality of edges and being asymmetrical with respect to a center line of the variable resistance element such that a switching current is reduced,
wherein the variable resistance element comprises:
a first magnetic layer having a pinned magnetization direction;
a second magnetic layer having a non-pinned magnetization direction and having a damping constant ranging from 0.0007 to 0.1; and
a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer,
wherein the variable resistance element has more angled edges than rounded edges as the damping constant of the second magnetic layer increases, and
wherein a shape of the variable resistance element is changed according to a change of the damping constant value,
wherein the variable resistance element includes at least one angled edge or at least one rounded edge.
8. The electronic device according to claim 7 , wherein the variable resistance element includes only the rounded edges or only the angled edges.
9. An electronic device comprising a variable resistance element, the variable resistance element comprising:
a first magnetic layer with a pinned magnetization direction;
a second magnetic layer with a non-pinned magnetization direction; and
a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer,
wherein, the variable resistance element has more angled edges than rounded edges such that a switching current is reduced as a damping constant of the second magnetic layer increases, and a shape of the variable resistance element is changed according to a change of the damping constant value,
wherein, when the second magnetic layer is in a first shape and a reference magnetic layer is a circle in a top view,
wherein the second magnetic layer and the reference magnetic layer are substantially the same as each other in material and in size, but different from each other in shape,
wherein, at a reference damping constant, the second magnetic layer and the reference magnetic layer have substantially the same switching current density as each other,
wherein the damping constant of the second magnetic layer is higher than the reference damping constant, and
wherein the first shape has at least one angled edge,
wherein the second magnetic layer in the first shape has a switching current density lower than the reference magnetic layer.
10. The electronic device of claim 9 , wherein the first shape is a polygon having four or more angled edges or is in an irregular shape.
11. The electronic device of claim 9 , wherein the reference damping constant is about 0.015.
12. The electronic device according to claim 9 , further comprising a processing system which includes:
a processor configured to decode a command received by the processor and control an operation for information based on a result of decoding the command;
an auxiliary memory device configured to store a program for decoding the command and the information;
a main memory device configured to call and store the program and the information from the auxiliary memory device such that the processor performs the operation using the program and the information when executing the program; and
an interface device configured to perform communication between at least one of the processor, the auxiliary memory device and the main memory device and the outside,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the auxiliary memory device or the main memory device in the processing system.
13. The electronic device according to claim 9 , further comprising a data storage system which includes:
a storage device configured to store data and conserve stored data regardless of power supply;
a controller configured to control input and output of data to and from the storage device according to a command inputted form an outside;
a temporary storage device configured to temporarily store data exchanged between the storage device and the outside; and
an interface configured to perform communication between at least one of the storage device, the controller and the temporary storage device and the outside,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the storage device or the temporary storage device in the data storage system.
14. An electronic device comprising a variable resistance element, the variable resistance element comprising:
a first magnetic layer with a pinned magnetization direction;
a second magnetic layer with a non-pinned magnetization direction; and
a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer,
wherein, the variable resistance element has more angled edges than rounded edges such that a switching current is reduced as a damping constant of the second magnetic layer increases, and a shape of the variable resistance element is changed according to a change of the damping constant value, and
wherein the second magnetic layer is an ellipse or in an irregular shape in a top view such that a switching current is reduced,
wherein the variable resistance element includes at least one angled edge or at least one rounded edge.
15. The electronic device according to claim 14 , further comprising a processing system which includes:
a processor configured to decode a command received by the processor and control an operation for information based on a result of decoding the command;
an auxiliary memory device configured to store a program for decoding the command and the information;
a main memory device configured to call and store the program and the information from the auxiliary memory device such that the processor performs the operation using the program and the information when executing the program; and
an interface device configured to perform communication between at least one of the processor, the auxiliary memory device and the main memory device and the outside,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the auxiliary memory device or the main memory device in the processing system.
16. The electronic device according to claim 14 , further comprising a data storage system which includes:
a storage device configured to store data and conserve stored data regardless of power supply;
a controller configured to control input and output of data to and from the storage device according to a command inputted form an outside;
a temporary storage device configured to temporarily store data exchanged between the storage device and the outside; and
an interface configured to perform communication between at least one of the storage device, the controller and the temporary storage device and the outside,
wherein the semiconductor memory unit that includes the variable resistance element is a part of the storage device or the temporary storage device in the data storage system.