IP Library Granted Patent US 9,257,073
Granted Patent B2
US 9,257,073 · App. 14/563,197 · Granted Feb 9, 2016

Display panel driving method, display apparatus, display panel driving apparatus and electronic apparatus

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Quick Facts
Patent No.
US 9,257,073
App. No.
14/563,197
Granted
Feb 9, 2016
Kind
B2
Abstract

A display panel driving method for controlling the total light emitting period length within a one-field period includes placing a first light emission period, a second light emission period, and a third light emission period within the one-field period, and adjusting, in a state in which a period length from a starting timing of the first light emission period to an ending timing of the third light emission period is at least 25% and at most 75% of a one-field period length, a first no-light emission period between the first light emission period and the second light emission period and a second no-light emission period between the second light emission period and the third light emission period.

Claims (17)

1. A display panel driving method for controlling a total light emission period length for which a pixel emits light within a one-field period, the method comprising:

placing a first light emission period, a second light emission period, and a third light emission period within the one-field period; and

adjusting, in a state in which a period length from a starting timing of the first light emission period to an ending timing of the third light emission period is at least 25% and at most 75% of a one-field period length, a first no-light emission period between the first light emission period and the second light emission period and a second no-light emission period between the second light emission period and the third light emission period,

wherein a length of the second light emission period is longer than a length of the first light emission period, and

wherein the length of the second light emission period is longer than a length of the third light emission period.

2. The display panel driving method according to claim 1 , wherein the pixel is configured to emit light only three times within the one-field period.

3. The display panel driving method according to claim 1 , further comprises:

disposing a sampling transistor, a capacitor, a switching transistor, a driving transistor, and a light-emitting element in a pixel circuit of the pixel; and

placing the switching transistor between the driving transistor and the light-emitting element.

4. A display apparatus, comprising:

a display panel driving unit configured to control a total light emission period length for which a pixel emits light within a one-field period by

placing a first light emission period, a second light emission period, and a third light emission period within the one-field period; and

adjusting, in a state in which a period length from a starting timing of the first light emission period to an ending timing of the third light emission period is at least 25% and at most 75% of a one-field period length, a first no-light emission period between the first light emission period and the second light emission period and a second no-light emission period between the second light emission period and the third light emission period,

wherein a length of the second light emission period is longer than a length of the first light emission period, and

wherein the length of the second light emission period is longer than a length of the third light emission period.

5. The display apparatus according to claim 4 , wherein the pixel is configured to emit light only three times within the one-field period.

6. The display apparatus according to claim 4 , wherein the pixel has a pixel circuit including a sampling transistor, a capacitor, a switching transistor, a driving transistor, and a light-emitting element, and the switching transistor is disposed between the driving transistor and the light-emitting element.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036090/0968 →