IP Library Granted Patent US 9,385,209
Granted Patent B2
US 9,385,209 · App. 14/563,405 · Granted Jul 5, 2016

Semiconductor device and method of manufacturing the same

Inventors: Daiyu Kondo (Kawasaki, JP); Shintaro Sato (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H01L29/66015H01L21/0262H01L21/02381H01L21/02488H01L21/02491H01L21/02502H01L21/02645H01L23/53276H01L29/1606H01L29/66742H01L29/778H01L29/78648H01L21/02527H01L29/78645H01L29/78684H01L2924/0002Y10S977/734
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Quick Facts
Patent No.
US 9,385,209
App. No.
14/563,405
Granted
Jul 5, 2016
Kind
B2
Abstract

A semiconductor device including a graphene layer and a method of manufacturing the same are disclosed. A method in which graphene is grown on a catalyst metal by a chemical vapor deposition or the like is known. However, the graphene cannot be used as a channel, since the graphene is in contact with the catalyst metal, which is conductive. There is disclosed a method in which a catalyst film ( 2 ) is formed over a substrate ( 1 ), a graphene layer ( 3 ) is grown originating from the catalyst film ( 2 ), an electrode ( 4 ) in contact with the graphene layer ( 3 ) is formed, and the catalyst film ( 2 ) is removed.

Claims (18)

1. A method of manufacturing a semiconductor device, comprising:

forming a catalyst film over an insulator;

growing a graphene layer originating from the catalyst film;

forming a conductive film in contact with the graphene layer, over the insulator;

removing the catalyst film;

forming a gate insulation film over the graphene layer; and

forming a top gate electrode over the gate insulation film.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a second gate insulation film between the insulator and the graphene layer; and

forming a back gate electrode at a position where the second gate insulation film is sandwiched between the back gate electrode and the graphene layer.

3. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

making a first part of the graphene layer located on one side of the conductive film thinner than a second part of the graphene layer located on another side of the conductive film;

forming a second gate insulation film between the insulator and the first part; and forming a back gate electrode at a position where the second gate insulation film is sandwiched between the back gate electrode and the first part.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the graphene layer is grown from both uppers surface and lower surface of the catalyst film.

5. The method of manufacturing a semiconductor device according to claim 4 , further comprising:

removing a part of a portion of the graphene layer grown from the lower surface of the catalyst film;

forming a second gate insulation film between the insulator and a portion of the graphene layer grown from the upper surface of the catalyst film; and

forming a back gate electrode at a position where the second gate insulation film is sandwiched between the back gate electrode and the graphene layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2014
From: KONDO, DAIYU; SATO, SHINTARO
To: FUJITSU LIMITED
Reel/Frame 034602/0892 →
Continuity (3)
Division 13453125 · Apr 23, 2012
Continuation PCTJP2009069383 · Nov 13, 2009
Related Publication 20150137076A1 · May 21, 2015