Multiply adder
A floating point multiply add circuit 24 includes a multiplier 26 and an adder 28 . The input operands A, B and C together with the result value all have a normal exponent value range, such as a range consistent with the IEEE Standard 754. The product value which is passed from the multiplier 26 to the adder 28 as an extended exponent value range that extents lower than the normal exponent value range. Shifters 48, 50 within the adder can take account of the extended exponent value range of the product as necessary in order to bring the result value back into the normal exponent value range.
1. Apparatus for performing an arithmetic operation A+(B*C), where A, B and C are floating point numbers each having an exponent value within an exponent value range and a mantissa value, said apparatus comprising:
multiplier circuitry configured to multiply B and C to generate a product having a product mantissa value and a product exponent value; and
adder circuitry configured to add A and said product to generate a result value; wherein
said multiplier circuitry is configured to generate said product exponent value passed to said adder circuitry within an extended exponent value range that extends to lower values than said exponent value range, wherein said multiplier circuitry is configured, when said product exponent has a value lower than said exponent value range, to generate an out-of-range exponent flag signal sent to said adder circuitry; and
said adder circuitry is configured to receive said product exponent value within said extended exponent value range, to determine how to interpret said product exponent value in dependence on whether said out-of-range exponent flag signal has been generated by said multiplier circuitry, and to generate said result value with a result exponent within said exponent value range.
2. Apparatus as claimed in claim 1 , wherein said product passed from said multiplier circuitry to said adder circuitry is unrounded.
3. Apparatus as claimed in claim 1 , wherein said multiplier circuitry comprises:
first count-leading-zero circuitry configured to determine a first count value of a number of leading zeros in a mantissa value of B;
a first shifter configured to left shift said mantissa of B by a number of places equal to said first count value to form a shifted mantissa of B if said first count value is greater than zero;
second count-leading-zero circuitry configured to determine a second count value of a number of leading zeros in a mantissa value of C; and
a second shifter configured to left shift said mantissa of C by a number of places equal to said second count value to form a shifted mantissa of C if said second count value is greater than zero.
4. Apparatus as claimed in claim 3 , wherein said multiplier circuitry is configured to form said product exponent as a sum of at least an exponent value of B, an exponent value of C, minus said first count value and minus said second count value.
5. Apparatus as claimed in claim 1 , wherein said adder circuitry comprises an adder shifter responsive to an exponent value of A and said product exponent to perform a shift operation upon at least one of a mantissa of A and said product mantissa to align in magnitude said mantissa of A and said product mantissa.
6. Apparatus as claimed in claim 1 , wherein said exponent value range is in accordance with IEEE Standard 754 and said extended exponent value range includes negative exponent values.
7. Apparatus for performing an arithmetic operation A+(B*C), where A, B and C are floating point numbers each having an exponent value within an exponent value range and a mantissa value, said apparatus comprising:
means for multiplying B and C to generate a product having a product mantissa value and a product exponent value; and
means for adding A and said product to generate a result value; wherein
said means for multiplying is configured to generates said product exponent value passed to said means for adding within an extended exponent value range that extends to lower values than said exponent value range, wherein said means for multiplying is configured to, when said product exponent has a value lower than said exponent value range, generate an out-of-range exponent flag signal sent to said means for adding; and
said means for adding is configured to receives said product exponent value within said extended exponent value range, determine how to interpret said product exponent value in dependence on whether said out-of-range exponent flag signal has been generated by said means for multiplying, and generates said result value with a result exponent within said exponent value range.
8. A method of performing an arithmetic operation A+(B*C), where A, B and C are floating point numbers each having an exponent value within an exponent value range and a mantissa value, said method comprising the steps of:
multiplying, by multiplying circuitry, B and C to generate a product having a product mantissa value and a product exponent value; and
adding, by adding circuitry, A and said product to generate a result value; wherein
said step of multiplying generates, by the multiplying circuitry, said product exponent value passed to the adding circuitry within an extended exponent value range that extends to lower values than said exponent value range, wherein said step of multiplying, when said product exponent has a value lower than said exponent value range, generates an out-of-range exponent flag signal; and
said step of adding includes the adding circuitry receiving said product exponent value within said extended exponent value range, determining how to interpret said product exponent value in dependence on whether said out-of-range exponent flag signal has been generated, and generating said result value with a result exponent within said exponent value range.