Mask, manufacturing method thereof and manufacturing method of a thin film transistor

1. A manufacturing method of a thin film transistor, including steps of:

forming an active layer above a second substrate;

forming a source-drain metal layer above the active layer; and

performing one patterning process on the active layer and the metal layer by using a mask, so as to form an active layer pattern, a source and a drain, a channel region being formed between the source and the drain, wherein the mask including a first substrate and phase shift patterns formed above the first substrate, an opening area being formed between the adjacent phase shift patterns, and a halftone pattern being formed directly on surfaces of the phase shift patterns away from the first substrate and being formed within the opening area between the adjacent phase shift patterns, wherein

the halftone pattern is capable of shifting phase of light passing therethrough by 0 degrees, and the phase shift patterns are capable of shifting phase of light passing therethrough by 180 degrees; and

a width of the channel region is smaller than a width of the opening area.

2. The manufacturing method of a thin film transistor according to claim 1 , wherein

light transmittance of the phase shift pattern ranges from 3% to 5%.

3. The manufacturing method of a thin film transistor according to claim 2 , wherein, before the step of forming the active layer above the second substrate, the method further includes steps of:

forming a gate metal layer above the second substrate;

performing a patterning process on the gate metal layer to form a gate; and

forming a gate insulation layer above the gate and above the second substrate, and

the step of forming the active layer above the second substrate specifically includes:

forming the active layer above the gate insulation layer.

4. The manufacturing method of a thin film transistor according to claim 2 , wherein

in a width direction of the channel region, dimension of the source ranges from 1.5 μm to 2.5 μm;

in the width direction of the channel region, dimension of the drain ranges from 1.5 μm to 2.5 μm; and

width of the channel region ranges from 1.5 μm to 2.5 μm.

5. The manufacturing method of a thin film transistor according to claim 1 , wherein

light transmittance of the halftone pattern ranges from 30% to 50%.

6. The manufacturing method of a thin film transistor according to claim 5 , wherein, before the step of forming the active layer above the second substrate, the method further includes steps of:

forming a gate metal layer above the second substrate;

performing a patterning process on the gate metal layer to form a gate; and

forming a gate insulation layer above the gate and above the second substrate, and

the step of forming the active layer above the second substrate specifically includes:

forming the active layer above the gate insulation layer.

7. The manufacturing method of a thin film transistor according to claim 5 , wherein

in a width direction of the channel region, dimension of the source ranges from 1.5 μm to 2.5 μm;

in the width direction of the channel region, dimension of the drain ranges from 1.5 μm to 2.5 μm; and

width of the channel region ranges from 1.5 μm to 2.5 μm.

8. The manufacturing method of a thin film transistor according to claim 1 , wherein, before the step of forming the active layer above the second substrate, the method further includes steps of:

forming a gate metal layer above the second substrate;

performing a patterning process on the gate metal layer to form a gate; and

forming a gate insulation layer above the gate and above the second substrate, and

the step of forming the active layer above the second substrate specifically includes:

forming the active layer above the gate insulation layer.

9. The manufacturing method of a thin film transistor according to claim 1 , wherein

in a width direction of the channel region, dimension of the source ranges from 1.5 μm to 2.5 μm;

in the width direction of the channel region, dimension of the drain ranges from 1.5 μm to 2.5 μm; and

width of the channel region ranges from 1.5 μm to 2.5 μm.

10. The manufacturing method of a thin film transistor according to claim 1 , wherein the step of performing one patterning process on the active layer and the metal layer by using the mask so as to form the active layer pattern, the source and the drain, the channel region being formed between the source and the drain specifically includes steps of:

forming a photoresist on the source-drain metal layer;

exposing the photoresist by using the mask, and developing the exposed photoresist;

etching the source-drain metal layer and the active layer;

ashing the photoresist to remove a part of the photoresist located above the channel region of the thin film transistor;

etching the source-drain metal layer again to form the source and the drain, the channel region being formed between the source and the drain; and

stripping the photoresist located on the source and the drain.

11. The manufacturing method of a thin film transistor according to claim 10 , wherein

light transmittance of the phase shift patterns ranges from 3% to 5%.

12. The manufacturing method of a thin film transistor according to claim 10 , wherein

light transmittance of the halftone pattern ranges from 30% to 50%.

13. The manufacturing method of a thin film transistor according to claim 1 , wherein

the halftone pattern completely covers the surfaces of the phase shift patterns away from the first substrate and the opening area between the adjacent phase shift patterns.