IP Library Granted Patent US 10,270,705
Granted Patent B1
US 10,270,705 · App. 14/570,495 · Granted Apr 23, 2019

Transmission of stateful data over a stateless communications channel

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Quick Facts
Patent No.
US 10,270,705
App. No.
14/570,495
Granted
Apr 23, 2019
Kind
B1
Abstract

A system and method for transmitting stateful data over a highly reliable stateless communications channel between a master device and a slave device is provided. Data that has been transmitted from the master device to the slave device is maintained in a buffer at the master device until the slave devices completes the actions required by commands accompanying the data and reports successful completion of the actions. Should an error occur in the data or processing of the data at the slave device an error message is sent from the slave device to the master device causing the stored transmitted data that has not as yet been acknowledged to be retransmitted to the slave device.

Claims (34)

1. A system for transmitting data, comprising:

a master device having a processor, further comprising:

a controller;

a memory having an output buffer and a replay buffer; and

a data transmission and a data reception interface, wherein the controller is configured to:

repeatedly assign sequential sequence numbers to data packets and transmit the data packets to a slave device without receiving receipt acknowledgments from the slave device, wherein at least some of the data packets include memory access requests;

store the data packets transmitted to the slave device in the replay buffer;

receive data packets back from the slave device including results of the memory access requests and having the sequence numbers previously assigned to the data packets by the master device;

delete the data packets from the replay buffer having the sequence numbers of the data packets received from the slave device;

receive one of the data packets including an error indication and including one of the sequence numbers; and

retransmit all data packets in the replay buffer having sequence numbers equal to or greater than the sequence number for the received one of the data packets including the error indication.

2. The system of claim 1 , wherein a first data packet of the data packets precedes a predetermined sequence of data packets without sequence numbers and a second data packet having another sequence number follows the predetermined sequence of data packets without the sequence number.

3. The system of claim 1 , wherein a first poll command is sent to the slave device to retrieve data from the slave device.

4. The system of claim 3 , wherein a second poll command is sent to the slave device when data is successfully received from the slave device.

5. The system of claim 1 , wherein the output buffer is a FIFO buffer.

6. The system of claim 1 , wherein the replay buffer area is a FIFO buffer.

7. A system including a slave device comprising:

a slave controller;

a memory having an input buffer and an output buffer; and

a data transmission and a data reception interface,

wherein the slave controller is configured to:

receive data packets from a master device that include sequentially assigned sequence numbers and memory access requests;

store the data packets in an input buffer and execute the memory access requests without sending receipt acknowledgments of the data packets to the master device;

store data packets including results of the memory access requests in the output buffer, the data packets in the output buffer including the sequence numbers of the data packets received from the master device associated with the same memory access requests;

transmit the data packets in the output buffer including the results of the memory access requests to the master device to acknowledge receipt of the data packets received from the master device;

notify the master device when an identified one of the data packets in the input buffer does not have a continuous sequential sequence number with the sequence numbers of the other data packets in the input buffer; and,

delete the data packets from the input buffer having sequence numbers equal to or higher than the sequence number for the identified one of the data packets.

8. The system of claim 7 , further configured to:

notify the master device by placing a notification packet in the output buffer with the sequence number of the identified one of the data packets.

9. The system of claim 8 , wherein the slave controller is further configured to execute the memory access requests for the data packets with sequence number less than the sequence number for the identified one of the data packets while receiving replacement data packets for the deleted data packets from the master device.

10. The system of claim 7 , wherein a first data packet precedes a predetermined sequence of data without sequence numbers and a second data packet follows the predetermined sequence, the slave controller is configured to process the predetermined sequence of data without sequence numbers and to perform a requested operation on the sequence of data without sequence numbers in the output buffer with the sequence number of the first data packet preceding the data without sequence numbers and the second sequence number following the following the results of the requested operation.

11. The system of claim 7 , wherein the slave device is configured to:

receive a first poll command and, responsive to the first poll command, dequeue data from the output buffer in FIFO order while retaining the data in the output buffer; and

receive a second poll command and, responsive to the second poll command, delete the dequeued data from the output buffer.

Assignments (7)
CORRECTIVE ASSIGNMENT TO REMOVE US PATENT NO. 9013874 PREVIOUSLY RECORDED UNDER REEL AND FRAME 064272/0249. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 17, 2024
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 068998/0780 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 064272/0249 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2021
From: SILICON VALLEY BANK
To: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC (F/K/A VIOLIN MEMORY, INC.))
Reel/Frame 056600/0186 →
CHANGE OF NAME Recorded May 25, 2021
From: VIOLIN SYSTEMS LLC
To: VSIP HOLDINGS LLC
Reel/Frame 056366/0849 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2018
From: FISCHER, STEPHEN
To: VIOLIN TECHNOLOGIES
Reel/Frame 045836/0435 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2018
From: ADELMAN, MAXIM
To: VIOLIN SYSTEMS LLC
Reel/Frame 045574/0065 →
CHANGE OF NAME Recorded Dec 19, 2017
From: VIOLIN MEMORY, INC.
To: VIOLIN SYSTEMS LLC
Reel/Frame 044908/0680 →